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| author | Tristan Gingold <tgingold@free.fr> | 2022-09-24 18:21:15 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-09-25 11:43:26 +0200 |
| commit | a35ef31a75c2f34ba89d0db3707006d2718f8782 (patch) | |
| tree | d24ff3d2869c58c9f8ac46782f0262f4f8ce8739 /src | |
| parent | 5bafaf971dc9d1f84620af65a4411b24316ada67 (diff) | |
| download | ghdl-a35ef31a75c2f34ba89d0db3707006d2718f8782.tar.gz ghdl-a35ef31a75c2f34ba89d0db3707006d2718f8782.tar.bz2 ghdl-a35ef31a75c2f34ba89d0db3707006d2718f8782.zip | |
simul: handle empty procedures
Diffstat (limited to 'src')
| -rw-r--r-- | src/simul/simul-vhdl_simul.adb | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/simul/simul-vhdl_simul.adb b/src/simul/simul-vhdl_simul.adb index 9242e938c..5eeebe7b6 100644 --- a/src/simul/simul-vhdl_simul.adb +++ b/src/simul/simul-vhdl_simul.adb @@ -1296,7 +1296,15 @@ package body Simul.Vhdl_Simul is Get_Suspend_State_Statement (Inst, Stmt, Resume); end if; - Execute_Sequential_Statements_Inner (Process, Stmt, Resume); + if Stmt = Null_Node then + -- No statement, return. + if Get_Kind (Src) = Iir_Kind_Procedure_Body then + Finish_Procedure_Call (Process, Src, Stmt); + end if; + else + -- There are statements + Execute_Sequential_Statements_Inner (Process, Stmt, Resume); + end if; end Execute_Sequential_Statements; procedure Execute_Concurrent_Procedure_Call (Proc : Process_State_Acc) |