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author | Tristan Gingold <tgingold@free.fr> | 2020-04-27 18:00:18 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-04-27 18:00:18 +0200 |
commit | a0db26a3e68b5ec12df37f99529a4c9ff6ddfdaf (patch) | |
tree | 9365f7671797f764b7dc7fdce157f5c3bab222cb /src | |
parent | c1093f4ef3120db4a7f5c2840c4b477c1a70b25c (diff) | |
download | ghdl-a0db26a3e68b5ec12df37f99529a4c9ff6ddfdaf.tar.gz ghdl-a0db26a3e68b5ec12df37f99529a4c9ff6ddfdaf.tar.bz2 ghdl-a0db26a3e68b5ec12df37f99529a4c9ff6ddfdaf.zip |
vhdl: minimal support of interface package in entities. For #1262
Diffstat (limited to 'src')
-rw-r--r-- | src/vhdl/translate/trans-chap1.adb | 3 | ||||
-rw-r--r-- | src/vhdl/translate/trans-chap4.adb | 8 | ||||
-rw-r--r-- | src/vhdl/translate/trans-chap5.adb | 38 | ||||
-rw-r--r-- | src/vhdl/translate/trans-rtis.adb | 3 | ||||
-rw-r--r-- | src/vhdl/translate/trans.ads | 2 | ||||
-rw-r--r-- | src/vhdl/vhdl-sem_assocs.adb | 8 | ||||
-rw-r--r-- | src/vhdl/vhdl-sem_decls.adb | 1 | ||||
-rw-r--r-- | src/vhdl/vhdl-sem_specs.adb | 5 |
8 files changed, 47 insertions, 21 deletions
diff --git a/src/vhdl/translate/trans-chap1.adb b/src/vhdl/translate/trans-chap1.adb index 1c1e18a92..05d76d6d2 100644 --- a/src/vhdl/translate/trans-chap1.adb +++ b/src/vhdl/translate/trans-chap1.adb @@ -163,7 +163,8 @@ package body Trans.Chap1 is end if; if Global_Storage = O_Storage_External then - -- Entity declaration subprograms. + -- Entity declaration subprograms as they can be called by the + -- architectures. Chap4.Translate_Declaration_Chain_Subprograms (Entity, Subprg_Translate_Spec_And_Body); else diff --git a/src/vhdl/translate/trans-chap4.adb b/src/vhdl/translate/trans-chap4.adb index 13688263c..f2ed9cd33 100644 --- a/src/vhdl/translate/trans-chap4.adb +++ b/src/vhdl/translate/trans-chap4.adb @@ -1739,7 +1739,13 @@ package body Trans.Chap4 is when Iir_Kinds_Interface_Object_Declaration => Create_Object (Decl); when Iir_Kind_Interface_Package_Declaration => - Create_Package_Interface (Decl); + if Get_Generic_Map_Aspect_Chain (Decl) = Null_Iir then + -- Need a formal + Create_Package_Interface (Decl); + else + -- Instantiated. + Chap2.Translate_Package_Instantiation_Declaration (Decl); + end if; when Iir_Kind_Interface_Type_Declaration | Iir_Kinds_Interface_Subprogram_Declaration => null; diff --git a/src/vhdl/translate/trans-chap5.adb b/src/vhdl/translate/trans-chap5.adb index 557b4d572..5b85430fe 100644 --- a/src/vhdl/translate/trans-chap5.adb +++ b/src/vhdl/translate/trans-chap5.adb @@ -18,6 +18,7 @@ with Vhdl.Errors; use Vhdl.Errors; with Vhdl.Utils; use Vhdl.Utils; +with Trans.Chap2; with Trans.Chap3; with Trans.Chap4; with Trans.Chap6; @@ -801,15 +802,28 @@ package body Trans.Chap5 is end if; end; when Iir_Kind_Association_Element_Open => - declare - Value : constant Iir := Get_Default_Value (Formal); - begin - pragma Assert (Is_Valid (Value)); - Set_Map_Env (Formal_Env); - Chap4.Elab_Object_Value (Formal, Value); - Chap9.Destroy_Types (Value); - Set_Map_Env (Actual_Env); - end; + case Get_Kind (Formal) is + when Iir_Kind_Interface_Constant_Declaration => + declare + Value : constant Iir := Get_Default_Value (Formal); + begin + pragma Assert (Is_Valid (Value)); + Set_Map_Env (Formal_Env); + Chap4.Elab_Object_Value (Formal, Value); + Chap9.Destroy_Types (Value); + Set_Map_Env (Actual_Env); + end; + when Iir_Kind_Interface_Package_Declaration => + -- The package interface have generics and implicitly + -- defines an instantiated package. + pragma Assert + (Get_Generic_Map_Aspect_Chain (Formal) /= Null_Iir); + Set_Map_Env (Formal_Env); + Chap2.Elab_Package_Instantiation_Declaration (Formal); + Set_Map_Env (Actual_Env); + when others => + Error_Kind ("elab_generic_map_aspect(open)", Formal); + end case; when Iir_Kind_Association_Element_By_Individual => -- Create the object. declare @@ -845,12 +859,10 @@ package body Trans.Chap5 is Get_Uninstantiated_Package_Decl (Formal); Uninst_Info : constant Ortho_Info_Acc := Get_Info (Uninst_Pkg); - Formal_Info : constant Ortho_Info_Acc := - Get_Info (Formal); + Formal_Info : constant Ortho_Info_Acc := Get_Info (Formal); Actual : constant Iir := Get_Named_Entity (Get_Actual (Assoc)); - Actual_Info : constant Ortho_Info_Acc := - Get_Info (Actual); + Actual_Info : constant Ortho_Info_Acc := Get_Info (Actual); begin New_Assign_Stmt (Get_Var (Formal_Info.Package_Instance_Spec_Var), diff --git a/src/vhdl/translate/trans-rtis.adb b/src/vhdl/translate/trans-rtis.adb index e4914d1f7..8a691fac5 100644 --- a/src/vhdl/translate/trans-rtis.adb +++ b/src/vhdl/translate/trans-rtis.adb @@ -2359,7 +2359,8 @@ package body Trans.Rtis is end; end if; - when Iir_Kind_Package_Instantiation_Declaration => + when Iir_Kind_Package_Instantiation_Declaration + | Iir_Kind_Interface_Package_Declaration => -- FIXME: todo null; diff --git a/src/vhdl/translate/trans.ads b/src/vhdl/translate/trans.ads index 487e5dba9..7f66809be 100644 --- a/src/vhdl/translate/trans.ads +++ b/src/vhdl/translate/trans.ads @@ -1989,7 +1989,7 @@ package Trans is -- block. Block_Id : Nat32; - -- Subprogram which elaborates the block (for entity or arch). + -- Subprograms which elaborates the block (for entity or arch). Block_Elab_Subprg : O_Dnode_Elab; -- Size of the block instance. diff --git a/src/vhdl/vhdl-sem_assocs.adb b/src/vhdl/vhdl-sem_assocs.adb index 20b8f5c09..ee85fc0f9 100644 --- a/src/vhdl/vhdl-sem_assocs.adb +++ b/src/vhdl/vhdl-sem_assocs.adb @@ -2679,8 +2679,12 @@ package body Vhdl.Sem_Assocs is when Missing_Allowed => null; end case; - when Iir_Kind_Interface_Package_Declaration - | Iir_Kind_Interface_Function_Declaration + when Iir_Kind_Interface_Package_Declaration => + if Get_Generic_Map_Aspect_Chain (Inter) = Null_Iir then + Error_Msg_Sem (+Loc, "%n must be associated", +Inter); + Match := Not_Compatible; + end if; + when Iir_Kind_Interface_Function_Declaration | Iir_Kind_Interface_Procedure_Declaration => Error_Msg_Sem (+Loc, "%n must be associated", +Inter); Match := Not_Compatible; diff --git a/src/vhdl/vhdl-sem_decls.adb b/src/vhdl/vhdl-sem_decls.adb index d30fd6e85..84354c2da 100644 --- a/src/vhdl/vhdl-sem_decls.adb +++ b/src/vhdl/vhdl-sem_decls.adb @@ -505,7 +505,6 @@ package body Vhdl.Sem_Decls is if Get_Generic_Map_Aspect_Chain (Inter) /= Null_Iir then Sem_Generic_Association_Chain (Get_Package_Header (Pkg), Inter); -- Not yet fully supported - need to check the instance. - raise Internal_Error; end if; Sem_Inst.Instantiate_Package_Declaration (Inter, Pkg); diff --git a/src/vhdl/vhdl-sem_specs.adb b/src/vhdl/vhdl-sem_specs.adb index e0a44848d..eca951a2b 100644 --- a/src/vhdl/vhdl-sem_specs.adb +++ b/src/vhdl/vhdl-sem_specs.adb @@ -1898,9 +1898,12 @@ package body Vhdl.Sem_Specs is -- current design unit does not depend on the entity. Name := Build_Simple_Name (Ent_El, Parent); Set_Is_Forward_Ref (Name, True); - Set_Type (Name, Get_Type (Ent_El)); Set_Formal (Assoc, Name); + if Get_Kind (Ent_El) in Iir_Kinds_Interface_Object_Declaration then + Set_Type (Name, Get_Type (Ent_El)); + end if; + if Kind = Map_Port and then not Error and then Comp_El /= Null_Iir |