WIP: array translation for unbounded arrays.

3 files changed, 45 insertions, 5 deletions

diff --git a/src/vhdl/sem_types.adb b/src/vhdl/sem_types.adb
index 007b130f3..0f3f38e05 100644
--- a/src/vhdl/sem_types.adb
+++ b/src/vhdl/sem_types.adb
@@ -48,6 +48,15 @@ package body Sem_Types is
       --  Maybe the type is resolved through its elements.
       if Func /= Null_Iir then
          Set_Resolution_Function_Flag (Func, True);
+
+         --  For internal reasons of translation, the element subtype has
+         --  to be translated for signals.
+         --  FIXME: maybe move the whole Has_Signal flag generation in
+         --  translation, as this is needed only for translation.
+         --  FIXME: how to deal with incorrect function ?  Use an Error node ?
+         Set_Type_Has_Signal
+           (Get_Element_Subtype
+              (Get_Type (Get_Interface_Declaration_Chain (Func))));
       end if;
    end Mark_Resolution_Function;
 
diff --git a/src/vhdl/translate/trans-chap3.adb b/src/vhdl/translate/trans-chap3.adb
index f25f47e89..3dcc564bb 100644
--- a/src/vhdl/translate/trans-chap3.adb
+++ b/src/vhdl/translate/trans-chap3.adb
@@ -894,6 +894,9 @@ package body Trans.Chap3 is
       Len : Iir_Int64;
 
       Id : O_Ident;
+      El_Constrained : Boolean;
+      El_Tinfo : Type_Info_Acc;
+      Base : O_Tnode;
    begin
       --  Note: info of indexes subtype are not created!
 
@@ -919,15 +922,42 @@ package body Trans.Chap3 is
 
          --  Type is bounded, but not statically.
          Create_Size_Var (Def, Info);
-      elsif Get_Array_Element_Constraint (Def) /= Null_Iir then
-         --  Length is known, element is static.
-         raise Internal_Error;
       else
          --  Length is known.  Create a constrained array.
+         El_Constrained := Get_Array_Element_Constraint (Def) /= Null_Iir;
+         if El_Constrained then
+            El_Tinfo := Get_Info (Get_Element_Subtype (Def));
+         end if;
          Info.Type_Mode := Type_Mode_Static_Array;
          Info.Ortho_Type (Mode_Signal) := O_Tnode_Null;
-         Info.Ortho_Ptr_Type := Binfo.B.Base_Ptr_Type;
+         Info.Ortho_Ptr_Type (Mode_Signal) := O_Tnode_Null;
          for I in Mode_Value .. Type_To_Last_Object_Kind (Def) loop
+            if El_Constrained then
+               --  Element has been constrained by this subtype, so create the
+               --  base array (and the pointer).
+               case I is
+                  when Mode_Value =>
+                     Id := Create_Identifier ("BARR");
+                  when Mode_Signal =>
+                     Id := Create_Identifier ("BARRSIG");
+               end case;
+               Base := New_Array_Type
+                 (El_Tinfo.Ortho_Type (I), Ghdl_Index_Type);
+               New_Type_Decl (Id, Base);
+
+               case I is
+                  when Mode_Value =>
+                     Id := Create_Identifier ("BARRPTR");
+                  when Mode_Signal =>
+                     Id := Create_Identifier ("BARRSIGPTR");
+               end case;
+               Info.Ortho_Ptr_Type (I) := New_Access_Type (Base);
+               New_Type_Decl (Id, Info.Ortho_Ptr_Type (I));
+            else
+               Base := Binfo.B.Base_Type (I);
+               Info.Ortho_Ptr_Type (I) := Binfo.B.Base_Ptr_Type (I);
+            end if;
+
             case I is
                when Mode_Value =>
                   Id := Create_Identifier;
@@ -935,7 +965,7 @@ package body Trans.Chap3 is
                   Id := Create_Identifier ("SIG");
             end case;
             Info.Ortho_Type (I) := New_Constrained_Array_Type
-              (Binfo.B.Base_Type (I), New_Index_Lit (Unsigned_64 (Len)));
+              (Base, New_Index_Lit (Unsigned_64 (Len)));
             New_Type_Decl (Id, Info.Ortho_Type (I));
          end loop;
       end if;
diff --git a/src/vhdl/translate/trans-chap4.adb b/src/vhdl/translate/trans-chap4.adb
index 034e83389..612dd24aa 100644
--- a/src/vhdl/translate/trans-chap4.adb
+++ b/src/vhdl/translate/trans-chap4.adb
@@ -1695,6 +1695,7 @@ package body Trans.Chap4 is
          when Iir_Kind_Component_Declaration =>
             Chap4.Translate_Component_Declaration (Decl);
          when Iir_Kind_Type_Declaration =>
+            --  A type declaration can be in fact a subtype declaration.
             Chap4.Translate_Type_Declaration (Decl);
          when Iir_Kind_Anonymous_Type_Declaration =>
             Chap4.Translate_Anonymous_Type_Declaration (Decl);