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| author | Tristan Gingold <tgingold@free.fr> | 2017-11-19 20:40:27 +0100 | 
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2017-11-19 20:40:27 +0100 | 
| commit | 501366998031d73cc4286aefabffafda39921a67 (patch) | |
| tree | 160b406fb9a79eede4b0fae7c53c2d7bd1d366a2 /src | |
| parent | 0872dc6307d0f1ead0f2e109ac8fd9293a0792dc (diff) | |
| download | ghdl-501366998031d73cc4286aefabffafda39921a67.tar.gz ghdl-501366998031d73cc4286aefabffafda39921a67.tar.bz2 ghdl-501366998031d73cc4286aefabffafda39921a67.zip | |
Annotations: minor reformating.
Diffstat (limited to 'src')
| -rw-r--r-- | src/ghdldrv/ghdlsimul.adb | 2 | ||||
| -rw-r--r-- | src/vhdl/simulate/annotations.adb | 21 | ||||
| -rw-r--r-- | src/vhdl/simulate/annotations.ads | 18 | 
3 files changed, 15 insertions, 26 deletions
| diff --git a/src/ghdldrv/ghdlsimul.adb b/src/ghdldrv/ghdlsimul.adb index 2852f5f24..5fd84b13c 100644 --- a/src/ghdldrv/ghdlsimul.adb +++ b/src/ghdldrv/ghdlsimul.adb @@ -144,8 +144,6 @@ package body Ghdlsimul is              Elaboration.Trace_Elaboration := True;           elsif Arg.all = "--trace-drivers" then              Elaboration.Trace_Drivers := True; -         elsif Arg.all = "--trace-annotation" then -            Annotations.Trace_Annotation := True;           elsif Arg.all = "--trace-simu" then              Simulation.Trace_Simulation := True;           elsif Arg.all = "--trace-stmt" then diff --git a/src/vhdl/simulate/annotations.adb b/src/vhdl/simulate/annotations.adb index ac5be1962..acc6e8920 100644 --- a/src/vhdl/simulate/annotations.adb +++ b/src/vhdl/simulate/annotations.adb @@ -286,8 +286,7 @@ package body Annotations is        Current_Scope := Prot_Info.Frame_Scope; -      Annotate_Declaration_List -        (Prot_Info, Get_Declaration_Chain (Prot)); +      Annotate_Declaration_List (Prot_Info, Get_Declaration_Chain (Prot));        Current_Scope := Prev_Scope;     end Annotate_Protected_Type_Body; @@ -570,11 +569,10 @@ package body Annotations is        Current_Scope := Prev_Scope;     end Annotate_Subprogram_Body; -   procedure Annotate_Component_Declaration -     (Comp: Iir_Component_Declaration) +   procedure Annotate_Component_Declaration (Comp: Iir_Component_Declaration)     is -      Info: Sim_Info_Acc;        Prev_Scope : constant Scope_Type := Current_Scope; +      Info : Sim_Info_Acc;     begin        Current_Scope := (Kind => Scope_Kind_Component); @@ -924,8 +922,8 @@ package body Annotations is     procedure Annotate_Process_Statement (Block_Info : Sim_Info_Acc; Stmt : Iir)     is        pragma Unreferenced (Block_Info); -      Info: Sim_Info_Acc;        Prev_Scope : constant Scope_Type := Current_Scope; +      Info : Sim_Info_Acc;     begin        Increment_Current_Scope; @@ -945,7 +943,7 @@ package body Annotations is     procedure Annotate_Concurrent_Statements_List       (Block_Info: Sim_Info_Acc; Stmt_Chain : Iir)     is -      El: Iir; +      El : Iir;     begin        El := Stmt_Chain;        while El /= Null_Iir loop @@ -1196,18 +1194,13 @@ package body Annotations is     end Annotate_Expand_Table;     -- Decorate the tree in order to be usable with the internal simulator. -   procedure Annotate (Tree: Iir_Design_Unit) +   procedure Annotate (Unit : Iir_Design_Unit)     is -      El: Iir; +      El : constant Iir := Get_Library_Unit (Unit);     begin        --  Expand info table.        Annotate_Expand_Table; -      El := Get_Library_Unit (Tree); -      if Trace_Annotation then -         Report_Msg (Msgid_Note, Semantic, No_Location, -                     "annotating %n", (1 => +El)); -      end if;        case Get_Kind (El) is           when Iir_Kind_Entity_Declaration =>              Annotate_Entity (El); diff --git a/src/vhdl/simulate/annotations.ads b/src/vhdl/simulate/annotations.ads index 9b99f977d..e45084079 100644 --- a/src/vhdl/simulate/annotations.ads +++ b/src/vhdl/simulate/annotations.ads @@ -21,14 +21,12 @@ with Iir_Values; use Iir_Values;  with Types; use Types;  package Annotations is -   Trace_Annotation : Boolean := False; +   --  Decorate the tree in order to be usable with the internal simulator. +   procedure Annotate (Unit : Iir_Design_Unit); -   -- Decorate the tree in order to be usable with the internal simulator. -   procedure Annotate (Tree: Iir_Design_Unit); - -   -- Disp annotations for an iir node. -   procedure Disp_Vhdl_Info (Node: Iir); -   procedure Disp_Tree_Info (Node: Iir); +   --  Disp annotations for an iir node. +   procedure Disp_Vhdl_Info (Node : Iir); +   procedure Disp_Tree_Info (Node : Iir);     type Object_Slot_Type is new Natural;     subtype Parameter_Slot_Type is Object_Slot_Type range 0 .. 2**15; @@ -54,7 +52,7 @@ package Annotations is        Kind_PSL,        Kind_Extra); -   type Sim_Info_Type (Kind: Sim_Info_Kind); +   type Sim_Info_Type (Kind : Sim_Info_Kind);     type Sim_Info_Acc is access all Sim_Info_Type;     -- Scope corresponding to an object. @@ -139,9 +137,9 @@ package Annotations is     end record;     -- Get/Set annotation fied from/to an iir. -   procedure Set_Info (Target: Iir; Info: Sim_Info_Acc); +   procedure Set_Info (Target : Iir; Info : Sim_Info_Acc);     pragma Inline (Set_Info); -   function Get_Info (Target: Iir) return Sim_Info_Acc; +   function Get_Info (Target : Iir) return Sim_Info_Acc;     pragma Inline (Get_Info);     --  Expand the annotation table.  This is automatically done by Annotate, | 
