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| author | Tristan Gingold <tgingold@free.fr> | 2023-01-13 21:58:30 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2023-01-14 08:37:14 +0100 |
| commit | 33df2265c63c44c83a5c44e577b8d286a40c9b53 (patch) | |
| tree | bab7cbeac681a5794e263d944b327ac8b29a1de8 /src | |
| parent | 459a86cfe7ca49ce1ff0582f46214f28c442aa69 (diff) | |
| download | ghdl-33df2265c63c44c83a5c44e577b8d286a40c9b53.tar.gz ghdl-33df2265c63c44c83a5c44e577b8d286a40c9b53.tar.bz2 ghdl-33df2265c63c44c83a5c44e577b8d286a40c9b53.zip | |
elab-vhdl_types(synth_record_type_definition): create unbounded record
if the result is unbounded.
Diffstat (limited to 'src')
| -rw-r--r-- | src/synth/elab-vhdl_types.adb | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/synth/elab-vhdl_types.adb b/src/synth/elab-vhdl_types.adb index e44e50285..66efecde8 100644 --- a/src/synth/elab-vhdl_types.adb +++ b/src/synth/elab-vhdl_types.adb @@ -275,6 +275,7 @@ package body Elab.Vhdl_Types is El : Node; El_Type : Node; El_Typ : Type_Acc; + Bounded : Boolean; Parent_Els : Rec_El_Array_Acc; begin @@ -285,6 +286,7 @@ package body Elab.Vhdl_Types is Parent_Els := Parent_Typ.Rec; end if; + Bounded := True; for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); El_Type := Get_Type (El); @@ -299,13 +301,16 @@ package body Elab.Vhdl_Types is El_Typ := Synth_Subtype_Indication_If_Anonymous (Syn_Inst, El_Type); end if; + if Bounded and then not Is_Bounded_Type (El_Typ) then + Bounded := False; + end if; Rec_Els.E (Iir_Index32 (I + 1)).Typ := El_Typ; end loop; - if not Is_Fully_Constrained_Type (Def) then - return Create_Unbounded_Record (Rec_Els); - else + if Bounded then return Create_Record_Type (Rec_Els); + else + return Create_Unbounded_Record (Rec_Els); end if; end Synth_Record_Type_Definition; |