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authorTristan Gingold <tgingold@free.fr>2021-08-29 07:28:08 +0200
committerTristan Gingold <tgingold@free.fr>2021-08-29 11:50:17 +0200
commit2b8e100539fbbf2c27a6acbc9905ba50b0f352b1 (patch)
tree340a5d8532f02c666c1b498154d98bbc4b8f8b04 /src
parent886fdeb52c4d37540e854dc2d57f8f95de09d4dc (diff)
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synth-vhdl_stmts: fix a crash on never triggered PSL assertion.
For #1832
Diffstat (limited to 'src')
-rw-r--r--src/synth/synth-vhdl_stmts.adb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb
index 89c96012a..ddf579656 100644
--- a/src/synth/synth-vhdl_stmts.adb
+++ b/src/synth/synth-vhdl_stmts.adb
@@ -3283,10 +3283,16 @@ package body Synth.Vhdl_Stmts is
S := Get_Next_State (S);
end loop;
+ -- Maybe there is no edge to the first state (common for restrict).
if D_Arr (Nbr_States - 1) = No_Net then
D_Arr (Nbr_States - 1) := Build_Const_UB32 (Ctxt, 0, 1);
end if;
+ -- Maybe there is no edge to the final state.
+ if D_Arr (0) = No_Net then
+ D_Arr (0) := Build_Const_UB32 (Ctxt, 0, 1);
+ end if;
+
Concat_Array (Ctxt, D_Arr.all, Res);
Free_Net_Array (D_Arr);