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| author | Tristan Gingold <tgingold@free.fr> | 2018-11-21 06:44:40 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2018-11-21 06:44:40 +0100 |
| commit | 2971a32a22eb1364413a0df241d56beb748c3e99 (patch) | |
| tree | f2d67b064059fca0db3ca201bf1c71e4decb47d9 /src | |
| parent | 43933d2b1073b657827cfcfc7105d84141926f2a (diff) | |
| download | ghdl-2971a32a22eb1364413a0df241d56beb748c3e99.tar.gz ghdl-2971a32a22eb1364413a0df241d56beb748c3e99.tar.bz2 ghdl-2971a32a22eb1364413a0df241d56beb748c3e99.zip | |
translate: minor refactoring.
Diffstat (limited to 'src')
| -rw-r--r-- | src/vhdl/translate/trans-chap4.adb | 4 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap6.adb | 3 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap8.adb | 11 |
3 files changed, 7 insertions, 11 deletions
diff --git a/src/vhdl/translate/trans-chap4.adb b/src/vhdl/translate/trans-chap4.adb index c1599472c..73f8aa4e1 100644 --- a/src/vhdl/translate/trans-chap4.adb +++ b/src/vhdl/translate/trans-chap4.adb @@ -1158,9 +1158,7 @@ package body Trans.Chap4 is Data.Has_Val := False; else Data.Has_Val := True; - Data.Init_Val := E2M (Chap7.Translate_Expression (Value, Sig_Type), - Get_Info (Sig_Type), - Mode_Value); + Data.Init_Val := Chap7.Translate_Expression (Value, Sig_Type); end if; else -- Sub signal. diff --git a/src/vhdl/translate/trans-chap6.adb b/src/vhdl/translate/trans-chap6.adb index a812f3331..bdffe5f5a 100644 --- a/src/vhdl/translate/trans-chap6.adb +++ b/src/vhdl/translate/trans-chap6.adb @@ -1170,8 +1170,7 @@ package body Trans.Chap6 is pragma Assert (Mode = Mode_Value); -- This can appear as a prefix of a name, therefore, the -- result is always a composite type or an access type. - return E2M (Chap7.Translate_Expression (Name), - Type_Info, Mode_Value); + return Chap7.Translate_Expression (Name); when Iir_Kind_Image_Attribute => pragma Assert (Mode = Mode_Value); diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb index 705617ac7..5d565e128 100644 --- a/src/vhdl/translate/trans-chap8.adb +++ b/src/vhdl/translate/trans-chap8.adb @@ -2976,10 +2976,12 @@ package body Trans.Chap8 is -- Individual association: assign the individual actual of -- the whole actual. if Sig = O_Enode_Null then + -- Arghh.. Msig := Mnode_Null; else Msig := E2M (Sig, Get_Info (Formal_Type), Mode_Signal); end if; + -- Note: Ftype_Info may be null (if the formal is a slice). Trans_Individual_Assign (Assoc, E2M (Val, Get_Info (Formal_Type), Mode_Value), Msig); end if; @@ -4212,8 +4214,7 @@ package body Trans.Chap8 is Expr : Mnode; Stable_Targ : Mnode; begin - Expr := E2M (Chap7.Translate_Expression (We, Target_Type), - Target_Tinfo, Mode_Value); + Expr := Chap7.Translate_Expression (We, Target_Type); if Is_Composite (Target_Tinfo) then Stabilize (Expr); Stable_Targ := Stabilize (Targ); @@ -4392,8 +4393,7 @@ package body Trans.Chap8 is if Get_Kind (Value) = Iir_Kind_Null_Literal then Val := Mnode_Null; else - Val := E2M (Chap7.Translate_Expression (Value, Target_Type), - Targ_Tinfo, Mode_Value); + Val := Chap7.Translate_Expression (Value, Target_Type); Val := Stabilize (Val); Chap3.Check_Array_Match (Target_Type, Var_Targ, Get_Type (Value), Val, We); @@ -4424,8 +4424,7 @@ package body Trans.Chap8 is if Get_Kind (Value) = Iir_Kind_Null_Literal then Val := Mnode_Null; else - Val := E2M (Chap7.Translate_Expression (Value, Target_Type), - Targ_Tinfo, Mode_Value); + Val := Chap7.Translate_Expression (Value, Target_Type); if Is_Composite (Targ_Tinfo) then Stabilize (Val); Chap3.Check_Array_Match |