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| author | Tristan Gingold <tgingold@free.fr> | 2022-09-26 07:53:37 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-09-26 07:53:37 +0200 |
| commit | 0253646671c6000da87d12bebb2166284273ae04 (patch) | |
| tree | 45bfefa0b44858efa7378d8567650d97e3ea8153 /src | |
| parent | 476236deae896de421daab68890e2e2473caf13d (diff) | |
| download | ghdl-0253646671c6000da87d12bebb2166284273ae04.tar.gz ghdl-0253646671c6000da87d12bebb2166284273ae04.tar.bz2 ghdl-0253646671c6000da87d12bebb2166284273ae04.zip | |
synth: handle attributes in configurations
Diffstat (limited to 'src')
| -rw-r--r-- | src/simul/simul-vhdl_elab.adb | 4 | ||||
| -rw-r--r-- | src/simul/simul-vhdl_simul.adb | 2 | ||||
| -rw-r--r-- | src/synth/elab-vhdl_insts.adb | 12 | ||||
| -rw-r--r-- | src/synth/synth-vhdl_stmts.adb | 1 |
4 files changed, 16 insertions, 3 deletions
diff --git a/src/simul/simul-vhdl_elab.adb b/src/simul/simul-vhdl_elab.adb index 0fd99b551..ac2bc25c1 100644 --- a/src/simul/simul-vhdl_elab.adb +++ b/src/simul/simul-vhdl_elab.adb @@ -912,8 +912,10 @@ package body Simul.Vhdl_Elab is when Iir_Kind_Package_Declaration => Gather_Processes_Decls (Inst, Get_Declaration_Chain (N)); + when Iir_Kind_Configuration_Declaration => + null; when others => - Vhdl.Errors.Error_Kind ("gater_processes_1", N); + Vhdl.Errors.Error_Kind ("gather_processes_1", N); end case; pragma Assert (Areapools.Is_Empty (Expr_Pool)); diff --git a/src/simul/simul-vhdl_simul.adb b/src/simul/simul-vhdl_simul.adb index f7a51b822..e5ca86a53 100644 --- a/src/simul/simul-vhdl_simul.adb +++ b/src/simul/simul-vhdl_simul.adb @@ -2581,8 +2581,8 @@ package body Simul.Vhdl_Simul is Grt.Errors.Fatal_Error; end if; - pragma Assert (Dst_Val.Typ.Wkind = Wkind_Sim); Convert_Type_Width (Dst_Val.Typ); + pragma Assert (Dst_Val.Typ.Wkind = Wkind_Sim); Dst := Synth.Vhdl_Expr.Get_Value_Memtyp (Dst_Val); case Conv.Mode is diff --git a/src/synth/elab-vhdl_insts.adb b/src/synth/elab-vhdl_insts.adb index 8e23b9ff7..772c45fc1 100644 --- a/src/synth/elab-vhdl_insts.adb +++ b/src/synth/elab-vhdl_insts.adb @@ -255,6 +255,15 @@ package body Elab.Vhdl_Insts is end if; end Elab_Package_Instantiation; + procedure Elab_Configuration_Declaration (Parent_Inst : Synth_Instance_Acc; + Conf : Node) + is + Syn_Inst : Synth_Instance_Acc; + begin + Syn_Inst := Create_Package_Instance (Parent_Inst, Conf); + Elab_Declarations (Syn_Inst, Get_Declaration_Chain (Conf)); + end Elab_Configuration_Declaration; + procedure Elab_Dependencies (Parent_Inst : Synth_Instance_Acc; Unit : Node) is Dep_List : constant Node_List := Get_Dependence_List (Unit); @@ -275,7 +284,7 @@ package body Elab.Vhdl_Insts is when Iir_Kind_Entity_Declaration => null; when Iir_Kind_Configuration_Declaration => - null; + Elab_Configuration_Declaration (Parent_Inst, Dep_Unit); when Iir_Kind_Context_Declaration => null; when Iir_Kind_Package_Declaration => @@ -885,6 +894,7 @@ package body Elab.Vhdl_Insts is Elab_Dependencies (Root_Instance, Get_Design_Unit (Entity)); Elab_Dependencies (Root_Instance, Get_Design_Unit (Arch)); + Elab_Configuration_Declaration (Root_Instance, Config); pragma Assert (Is_Expr_Pool_Empty); diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb index 141ea05ff..df8f9994d 100644 --- a/src/synth/synth-vhdl_stmts.adb +++ b/src/synth/synth-vhdl_stmts.adb @@ -393,6 +393,7 @@ package body Synth.Vhdl_Stmts is (Syn_Inst, Target), Aggr => Target); when Iir_Kind_Simple_Name + | Iir_Kind_Selected_Name | Iir_Kind_Selected_Element | Iir_Kind_Interface_Signal_Declaration | Iir_Kind_Signal_Declaration |