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author | Tristan Gingold <tgingold@free.fr> | 2019-07-10 20:51:22 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-07-10 20:51:22 +0200 |
commit | e24abb5093365dfc578a154d9b89d84ca145a4fe (patch) | |
tree | 6b5026a3cf8b93ef5f78a2f7af2eb9c988b7355c /src/vhdl | |
parent | 258dce0685f3353c4515398aae683e86c0d91b55 (diff) | |
download | ghdl-e24abb5093365dfc578a154d9b89d84ca145a4fe.tar.gz ghdl-e24abb5093365dfc578a154d9b89d84ca145a4fe.tar.bz2 ghdl-e24abb5093365dfc578a154d9b89d84ca145a4fe.zip |
synth: do not crash on use of std_logic_1164 2008.
Diffstat (limited to 'src/vhdl')
-rw-r--r-- | src/vhdl/vhdl-annotations.adb | 14 |
1 files changed, 4 insertions, 10 deletions
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 1d9792948..077c66e99 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -359,16 +359,10 @@ package body Vhdl.Annotations is Annotate_Anonymous_Type_Definition (Block_Info, El); when Iir_Kind_Array_Subtype_Definition => - declare - El_Type : constant Iir := Get_Element_Subtype (Def); - Bel_Type : constant Iir := - Get_Element_Subtype (Get_Base_Type (Def)); - begin - if El_Type /= Bel_Type then - Annotate_Anonymous_Type_Definition - (Block_Info, Get_Element_Subtype (Def)); - end if; - end; + if Get_Array_Element_Constraint (Def) /= Null_Node then + Annotate_Type_Definition + (Block_Info, Get_Element_Subtype (Def)); + end if; if Flag_Synthesis then -- For the bounds. Create_Object_Info (Block_Info, Def); |