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author | Tristan Gingold <tgingold@free.fr> | 2021-09-12 16:38:37 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2021-09-12 16:38:37 +0200 |
commit | 9ce2b99b1f486eda8eb9d00bc4ce3709bb8a0962 (patch) | |
tree | f4e6ec6643977ada9a8a74d18582e952718af540 /src/vhdl | |
parent | 9d6e7f40d3c3c02b86325aa60c2cc5e9da18c9d7 (diff) | |
download | ghdl-9ce2b99b1f486eda8eb9d00bc4ce3709bb8a0962.tar.gz ghdl-9ce2b99b1f486eda8eb9d00bc4ce3709bb8a0962.tar.bz2 ghdl-9ce2b99b1f486eda8eb9d00bc4ce3709bb8a0962.zip |
trans-chap7: improve handling of vector in aggregates. Fix #1453
Diffstat (limited to 'src/vhdl')
-rw-r--r-- | src/vhdl/translate/trans-chap7.adb | 50 |
1 files changed, 27 insertions, 23 deletions
diff --git a/src/vhdl/translate/trans-chap7.adb b/src/vhdl/translate/trans-chap7.adb index 3d2a0b6e5..e53a290a2 100644 --- a/src/vhdl/translate/trans-chap7.adb +++ b/src/vhdl/translate/trans-chap7.adb @@ -3187,30 +3187,34 @@ package body Trans.Chap7 is Do_Assign (El, Get_Associated_Expr (El), Assoc_Len); return; when Iir_Kind_Choice_By_Range => - -- FIXME: todo. - pragma Assert (Get_Element_Type_Flag (El)); - declare - Var_Length : O_Dnode; - Var_I : O_Dnode; - Label : O_Snode; - begin - Open_Temp; - Var_Length := Create_Temp_Init - (Ghdl_Index_Type, - Chap7.Translate_Range_Length (Get_Choice_Range (El))); - Var_I := Create_Temp (Ghdl_Index_Type); - Init_Var (Var_I); - Start_Loop_Stmt (Label); - Gen_Exit_When (Label, - New_Compare_Op (ON_Eq, - New_Obj_Value (Var_I), - New_Obj_Value (Var_Length), - Ghdl_Bool_Type)); + if Get_Element_Type_Flag (El) then + declare + Var_Length : O_Dnode; + Var_I : O_Dnode; + Label : O_Snode; + begin + Open_Temp; + Var_Length := Create_Temp_Init + (Ghdl_Index_Type, + Chap7.Translate_Range_Length + (Get_Choice_Range (El))); + Var_I := Create_Temp (Ghdl_Index_Type); + Init_Var (Var_I); + Start_Loop_Stmt (Label); + Gen_Exit_When + (Label, + New_Compare_Op (ON_Eq, + New_Obj_Value (Var_I), + New_Obj_Value (Var_Length), + Ghdl_Bool_Type)); + Do_Assign (El, Get_Associated_Expr (El), Assoc_Len); + Inc_Var (Var_I); + Finish_Loop_Stmt (Label); + Close_Temp; + end; + else Do_Assign (El, Get_Associated_Expr (El), Assoc_Len); - Inc_Var (Var_I); - Finish_Loop_Stmt (Label); - Close_Temp; - end; + end if; return; when others => Error_Kind ("translate_array_aggregate_gen", El); |