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| author | Tristan Gingold <tgingold@free.fr> | 2022-05-26 13:37:28 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-05-26 13:37:28 +0200 |
| commit | ba126785e1ce562f242b1a104ada9cfb554f62e8 (patch) | |
| tree | 235d365719d1b625b05084b92d73cf7705f5e5f0 /src/vhdl/vhdl-nodes.ads | |
| parent | 58712f5c52fbe00dc83e8db9c5e262853e2b7617 (diff) | |
| download | ghdl-ba126785e1ce562f242b1a104ada9cfb554f62e8.tar.gz ghdl-ba126785e1ce562f242b1a104ada9cfb554f62e8.tar.bz2 ghdl-ba126785e1ce562f242b1a104ada9cfb554f62e8.zip | |
vhdl-canon: add Canon_Add_Suspend_State
Diffstat (limited to 'src/vhdl/vhdl-nodes.ads')
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 41 |
1 files changed, 40 insertions, 1 deletions
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 0dd339ef1..bbf411fd5 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -1882,6 +1882,8 @@ package Vhdl.Nodes is -- Get/Set_Parent (Field0) -- -- Get/Set_Chain (Field2) + -- + -- Get/Set_Suspend_State_Chain (Field4) -- Iir_Kind_Constant_Declaration (Medium) -- Iir_Kind_Iterator_Declaration (Short) @@ -4139,7 +4141,12 @@ package Vhdl.Nodes is -- -- Get/Set_Parent (Field0) -- + -- Next statement -- Get/Set_Chain (Field2) + -- + -- Get/Set_Suspend_State_Index (Field3) + -- + -- Get/Set_Suspend_State_Chain (Field4) ---------------- -- operators -- @@ -5137,8 +5144,8 @@ package Vhdl.Nodes is Iir_Kind_Procedure_Call_Statement, Iir_Kind_Break_Statement, Iir_Kind_If_Statement, - Iir_Kind_Elsif, Iir_Kind_Suspend_State_Statement, + Iir_Kind_Elsif, -- Names Iir_Kind_Character_Literal, -- denoting_name @@ -6991,6 +6998,30 @@ package Vhdl.Nodes is --Iir_Kind_Break_Statement Iir_Kind_If_Statement; + -- All sequential statements + suspend_state_statement. + subtype Iir_Kinds_Sequential_Statement_Ext is Iir_Kind range + Iir_Kind_Simple_Signal_Assignment_Statement .. + --Iir_Kind_Conditional_Signal_Assignment_Statement + --Iir_Kind_Selected_Waveform_Assignment_Statement + --Iir_Kind_Signal_Force_Assignment_Statement + --Iir_Kind_Signal_Release_Assignment_Statement + --Iir_Kind_Null_Statement + --Iir_Kind_Assertion_Statement + --Iir_Kind_Report_Statement + --Iir_Kind_Wait_Statement + --Iir_Kind_Variable_Assignment_Statement + --Iir_Kind_Conditional_Variable_Assignment_Statement + --Iir_Kind_Return_Statement + --Iir_Kind_For_Loop_Statement + --Iir_Kind_While_Loop_Statement + --Iir_Kind_Next_Statement + --Iir_Kind_Exit_Statement + --Iir_Kind_Case_Statement + --Iir_Kind_Procedure_Call_Statement + --Iir_Kind_Break_Statement + --Iir_Kind_If_Statement + Iir_Kind_Suspend_State_Statement; + subtype Iir_Kinds_Next_Exit_Statement is Iir_Kind range Iir_Kind_Next_Statement .. Iir_Kind_Exit_Statement; @@ -9347,4 +9378,12 @@ package Vhdl.Nodes is -- Field: Field1 (uc) function Get_Foreign_Node (N : Iir) return Int32; procedure Set_Foreign_Node (N : Iir; En : Int32); + + -- Field: Field3 (uc) + function Get_Suspend_State_Index (N : Iir) return Int32; + procedure Set_Suspend_State_Index (N : Iir; Num : Int32); + + -- Field: Field4 Forward_Ref + function Get_Suspend_State_Chain (N : Iir) return Iir; + procedure Set_Suspend_State_Chain (N : Iir; Chain : Iir); end Vhdl.Nodes; |