diff options
| author | Tristan Gingold <tgingold@free.fr> | 2020-06-19 07:29:21 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-06-19 07:29:21 +0200 |
| commit | b07491996ae541300a1e2c82a5ccfd9414023bc6 (patch) | |
| tree | b3fa4b63d3721c7d14ef0c53450e56695fbd93f9 /src/vhdl/vhdl-nodes.ads | |
| parent | cfc4b80aa2fef5d58394241bcd157132f3ef54fd (diff) | |
| download | ghdl-b07491996ae541300a1e2c82a5ccfd9414023bc6.tar.gz ghdl-b07491996ae541300a1e2c82a5ccfd9414023bc6.tar.bz2 ghdl-b07491996ae541300a1e2c82a5ccfd9414023bc6.zip | |
synth: handle std_logic_signed.conv_integer. For ghdl/ghdl-yosys-plugin#126
Diffstat (limited to 'src/vhdl/vhdl-nodes.ads')
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 07faf5b7b..889f8ad70 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5831,6 +5831,8 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Std_Logic_Signed_Mul_Slv_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Conv_Integer, + -- std_logic_arith (synopsys extention). Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Int, Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Uns, |