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| author | Tristan Gingold <tgingold@free.fr> | 2022-08-15 09:15:10 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-08-15 16:54:37 +0200 |
| commit | 988eebde6d076261da5e94344b38445e6ed764f0 (patch) | |
| tree | e4bf9fcbd2a16b786721cefe0cbf40dfe12dfa8d /src/vhdl/vhdl-nodes.ads | |
| parent | da59184128af74905eb378b43df3e2047c86a9ec (diff) | |
| download | ghdl-988eebde6d076261da5e94344b38445e6ed764f0.tar.gz ghdl-988eebde6d076261da5e94344b38445e6ed764f0.tar.bz2 ghdl-988eebde6d076261da5e94344b38445e6ed764f0.zip | |
vhdl: add iir_kind_psl_boolean_parameter node. For #2178
Diffstat (limited to 'src/vhdl/vhdl-nodes.ads')
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index e375ffbc9..4ef9b466a 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -2151,7 +2151,7 @@ package Vhdl.Nodes is -- -- Get/Set_Identifier (Field3) -- - -- Get/Set_Psl_Declaration (Field6) + -- Get/Set_Psl_Declaration (Field5) -- -- Get/Set_PSL_Clock (Field7) -- @@ -2182,7 +2182,7 @@ package Vhdl.Nodes is -- -- Get/Set_Identifier (Field3) -- - -- Get/Set_Psl_Declaration (Field6) + -- Get/Set_Psl_Declaration (Field5) -- -- Valid only for property declaration. -- Get/Set_PSL_Clock (Field7) @@ -2194,6 +2194,25 @@ package Vhdl.Nodes is -- -- Get/Set_Use_Flag (Flag6) + -- Iir_Kind_Psl_Boolean_Parameter (Short) + -- A psl boolean parameter. + -- + -- Get/Set_Parent (Field0) + -- + -- Get/Set_Identifier (Field3) + -- + -- Get/Set_Psl_Declaration (Field5) + -- + -- Get/Set_Type (Field1) + -- + -- Get/Set_Chain (Field2) + -- + -- Get/Set_Expr_Staticness (State1) + -- + -- Get/Set_Visible_Flag (Flag4) + -- + -- Get/Set_Use_Flag (Flag6) + -- Iir_Kind_Terminal_Declaration (Short) -- -- Get/Set_Parent (Field0) @@ -5038,6 +5057,7 @@ package Vhdl.Nodes is Iir_Kind_Non_Object_Alias_Declaration, Iir_Kind_Psl_Declaration, + Iir_Kind_Psl_Boolean_Parameter, Iir_Kind_Psl_Endpoint_Declaration, Iir_Kind_Enumeration_Literal, @@ -9540,7 +9560,7 @@ package Vhdl.Nodes is function Get_Psl_Sequence (Decl : Iir) return PSL_Node; procedure Set_Psl_Sequence (Decl : Iir; Prop : PSL_Node); - -- Field: Field6 (uc) + -- Field: Field5 (uc) function Get_Psl_Declaration (Decl : Iir) return PSL_Node; procedure Set_Psl_Declaration (Decl : Iir; Prop : PSL_Node); |