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| author | Tristan Gingold <tgingold@free.fr> | 2021-11-09 20:54:19 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2021-11-09 20:54:19 +0100 |
| commit | 96245c0a4df7a6bc07cd8b7c15268c78c459f3b7 (patch) | |
| tree | 8c9aacd46303689492872db13bb71cb2a61ba44a /src/vhdl/vhdl-nodes.adb | |
| parent | 144cedec159574df474579fa2cc7fde7e61eadbc (diff) | |
| download | ghdl-96245c0a4df7a6bc07cd8b7c15268c78c459f3b7.tar.gz ghdl-96245c0a4df7a6bc07cd8b7c15268c78c459f3b7.tar.bz2 ghdl-96245c0a4df7a6bc07cd8b7c15268c78c459f3b7.zip | |
vhdl: Iir_Kind_Foreign_Module is now a library unit
(instead of a design unit).
Also, add Iir_Kind_Foreign_Vector_Type_Definition
Diffstat (limited to 'src/vhdl/vhdl-nodes.adb')
| -rw-r--r-- | src/vhdl/vhdl-nodes.adb | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/vhdl/vhdl-nodes.adb b/src/vhdl/vhdl-nodes.adb index 478f59784..94c01f275 100644 --- a/src/vhdl/vhdl-nodes.adb +++ b/src/vhdl/vhdl-nodes.adb @@ -1243,7 +1243,6 @@ package body Vhdl.Nodes is return Format_Short; when Iir_Kind_Design_File | Iir_Kind_Design_Unit - | Iir_Kind_Foreign_Module | Iir_Kind_Block_Header | Iir_Kind_Binding_Indication | Iir_Kind_Signature @@ -1252,11 +1251,13 @@ package body Vhdl.Nodes is | Iir_Kind_Array_Subtype_Definition | Iir_Kind_Record_Subtype_Definition | Iir_Kind_Floating_Subtype_Definition + | Iir_Kind_Foreign_Vector_Type_Definition | Iir_Kind_Subtype_Definition | Iir_Kind_Scalar_Nature_Definition | Iir_Kind_Record_Nature_Definition | Iir_Kind_Array_Nature_Definition | Iir_Kind_Array_Subnature_Definition + | Iir_Kind_Foreign_Module | Iir_Kind_Entity_Declaration | Iir_Kind_Package_Declaration | Iir_Kind_Package_Instantiation_Declaration @@ -1623,7 +1624,7 @@ package body Vhdl.Nodes is pragma Assert (Design_Unit /= Null_Iir); pragma Assert (Has_Library_Unit (Get_Kind (Design_Unit)), "no field Library_Unit"); - return Get_Field5 (Design_Unit); + return Get_Field7 (Design_Unit); end Get_Library_Unit; procedure Set_Library_Unit (Design_Unit : Iir_Design_Unit; Lib_Unit : Iir) @@ -1632,7 +1633,7 @@ package body Vhdl.Nodes is pragma Assert (Design_Unit /= Null_Iir); pragma Assert (Has_Library_Unit (Get_Kind (Design_Unit)), "no field Library_Unit"); - Set_Field5 (Design_Unit, Lib_Unit); + Set_Field7 (Design_Unit, Lib_Unit); end Set_Library_Unit; function Get_Hash_Chain (Design_Unit : Iir_Design_Unit) return Iir is @@ -1640,7 +1641,7 @@ package body Vhdl.Nodes is pragma Assert (Design_Unit /= Null_Iir); pragma Assert (Has_Hash_Chain (Get_Kind (Design_Unit)), "no field Hash_Chain"); - return Get_Field7 (Design_Unit); + return Get_Field5 (Design_Unit); end Get_Hash_Chain; procedure Set_Hash_Chain (Design_Unit : Iir_Design_Unit; Chain : Iir) is @@ -1648,7 +1649,7 @@ package body Vhdl.Nodes is pragma Assert (Design_Unit /= Null_Iir); pragma Assert (Has_Hash_Chain (Get_Kind (Design_Unit)), "no field Hash_Chain"); - Set_Field7 (Design_Unit, Chain); + Set_Field5 (Design_Unit, Chain); end Set_Hash_Chain; function Get_Design_Unit_Source_Pos (Design_Unit : Iir) return Source_Ptr |