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author | Tristan Gingold <tgingold@free.fr> | 2018-12-07 05:23:57 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2018-12-07 05:23:57 +0100 |
commit | 606d84285a70c64d1eb57d9e4f908e986cd2b287 (patch) | |
tree | f6863fdb62391d7e91c0f4d21f8a67d28c34523d /src/vhdl/translate | |
parent | 3276b70eb3495f9ec871ba65003315acd499af5a (diff) | |
download | ghdl-606d84285a70c64d1eb57d9e4f908e986cd2b287.tar.gz ghdl-606d84285a70c64d1eb57d9e4f908e986cd2b287.tar.bz2 ghdl-606d84285a70c64d1eb57d9e4f908e986cd2b287.zip |
translate: renaming, support constrained unbounded record aggregates.
Diffstat (limited to 'src/vhdl/translate')
-rw-r--r-- | src/vhdl/translate/trans-chap3.adb | 4 | ||||
-rw-r--r-- | src/vhdl/translate/trans-chap3.ads | 5 | ||||
-rw-r--r-- | src/vhdl/translate/trans-chap4.adb | 2 | ||||
-rw-r--r-- | src/vhdl/translate/trans-chap5.adb | 8 | ||||
-rw-r--r-- | src/vhdl/translate/trans-chap6.adb | 2 | ||||
-rw-r--r-- | src/vhdl/translate/trans-chap7.adb | 9 | ||||
-rw-r--r-- | src/vhdl/translate/trans-chap8.adb | 2 |
7 files changed, 15 insertions, 17 deletions
diff --git a/src/vhdl/translate/trans-chap3.adb b/src/vhdl/translate/trans-chap3.adb index e10e2c2f2..c9b5c9ffb 100644 --- a/src/vhdl/translate/trans-chap3.adb +++ b/src/vhdl/translate/trans-chap3.adb @@ -3107,7 +3107,7 @@ package body Trans.Chap3 is Chap3.Elab_Composite_Subtype_Layout (Arr_Type); end Elab_Array_Subtype; - procedure Create_Array_Subtype (Sub_Type : Iir) + procedure Create_Composite_Subtype (Sub_Type : Iir) is Mark : Id_Mark_Type; begin @@ -3120,7 +3120,7 @@ package body Trans.Chap3 is -- Force creation of variables. Chap3.Create_Composite_Subtype_Layout_Var (Sub_Type, True); Pop_Identifier_Prefix (Mark); - end Create_Array_Subtype; + end Create_Composite_Subtype; -- Copy SRC to DEST. -- Both have the same type, OTYPE. diff --git a/src/vhdl/translate/trans-chap3.ads b/src/vhdl/translate/trans-chap3.ads index 7b5600b9c..1db37788b 100644 --- a/src/vhdl/translate/trans-chap3.ads +++ b/src/vhdl/translate/trans-chap3.ads @@ -285,8 +285,9 @@ package Trans.Chap3 is procedure Elab_Array_Subtype (Arr_Type : Iir); -- Create the bounds for SUB_TYPE. - -- SUB_TYPE is expected to be a non-static, anonymous array type. - procedure Create_Array_Subtype (Sub_Type : Iir); + -- SUB_TYPE is expected to be a non-static, anonymous array or record + -- subtype. + procedure Create_Composite_Subtype (Sub_Type : Iir); -- Return TRUE if VALUE is not is the range specified by ATYPE. -- VALUE must be stable. diff --git a/src/vhdl/translate/trans-chap4.adb b/src/vhdl/translate/trans-chap4.adb index 675dc3d62..7b8312290 100644 --- a/src/vhdl/translate/trans-chap4.adb +++ b/src/vhdl/translate/trans-chap4.adb @@ -548,7 +548,7 @@ package body Trans.Chap4 is declare Aggr_Type : constant Iir := Get_Type (Value); begin - Chap3.Create_Array_Subtype (Aggr_Type); + Chap3.Create_Composite_Subtype (Aggr_Type); Name_Node := Stabilize (Name); if Alloc_Kind = Alloc_Stack then -- Short-cut: don't allocate bounds. diff --git a/src/vhdl/translate/trans-chap5.adb b/src/vhdl/translate/trans-chap5.adb index c85ed26f0..cd02cf600 100644 --- a/src/vhdl/translate/trans-chap5.adb +++ b/src/vhdl/translate/trans-chap5.adb @@ -544,7 +544,7 @@ package body Trans.Chap5 is Bounds_Copy : Mnode; begin if Is_Fully_Constrained_Type (Actual_Type) then - Chap3.Create_Array_Subtype (Actual_Type); + Chap3.Create_Composite_Subtype (Actual_Type); Bounds := Chap3.Get_Composite_Type_Bounds (Actual_Type); Tinfo := Get_Info (Actual_Type); if Save @@ -636,14 +636,14 @@ package body Trans.Chap5 is Actual_Type : constant Iir := Get_Type (Get_Default_Value (Port)); begin - Chap3.Create_Array_Subtype (Actual_Type); + Chap3.Create_Composite_Subtype (Actual_Type); Bounds := Chap3.Get_Composite_Type_Bounds (Actual_Type); end; when Iir_Kind_Association_Element_By_Individual => declare Actual_Type : constant Iir := Get_Actual_Type (Assoc); begin - Chap3.Create_Array_Subtype (Actual_Type); + Chap3.Create_Composite_Subtype (Actual_Type); Bounds := Chap3.Get_Composite_Type_Bounds (Actual_Type); end; end case; @@ -829,7 +829,7 @@ package body Trans.Chap5 is Chap4.Allocate_Complex_Object (Formal_Type, Alloc_System, Formal_Node); else - Chap3.Create_Array_Subtype (Obj_Type); + Chap3.Create_Composite_Subtype (Obj_Type); Bounds := Chap3.Get_Composite_Type_Bounds (Obj_Type); Chap3.Translate_Object_Allocation (Formal_Node, Alloc_System, Formal_Type, Bounds); diff --git a/src/vhdl/translate/trans-chap6.adb b/src/vhdl/translate/trans-chap6.adb index bdffe5f5a..302458000 100644 --- a/src/vhdl/translate/trans-chap6.adb +++ b/src/vhdl/translate/trans-chap6.adb @@ -537,7 +537,7 @@ package body Trans.Chap6 is If_Blk, If_Blk1 : O_If_Block; begin -- Evaluate slice bounds. - Chap3.Create_Array_Subtype (Slice_Type); + Chap3.Create_Composite_Subtype (Slice_Type); -- The info may have just been created. Prefix_Info := Get_Info (Prefix_Type); diff --git a/src/vhdl/translate/trans-chap7.adb b/src/vhdl/translate/trans-chap7.adb index 4e2b46000..43268bad4 100644 --- a/src/vhdl/translate/trans-chap7.adb +++ b/src/vhdl/translate/trans-chap7.adb @@ -445,7 +445,7 @@ package body Trans.Chap7 is if Get_Constraint_State (Str_Type) = Fully_Constrained and then Are_Array_Indexes_Locally_Static (Str_Type) then - Chap3.Create_Array_Subtype (Str_Type); + Chap3.Create_Composite_Subtype (Str_Type); case Get_Kind (Str) is when Iir_Kind_String_Literal8 => Res := Translate_Static_String_Literal8 (Str); @@ -3628,7 +3628,7 @@ package body Trans.Chap7 is begin Sub_Type := Get_Subtype_Indication (Expr); Sub_Type := Get_Type_Of_Subtype_Indication (Sub_Type); - Chap3.Create_Array_Subtype (Sub_Type); + Chap3.Create_Composite_Subtype (Sub_Type); Ptr := Create_Temp (A_Info.Ortho_Type (Mode_Value)); @@ -4063,10 +4063,7 @@ package body Trans.Chap7 is null; end if; - if Get_Kind (Aggr_Type) = Iir_Kind_Array_Subtype_Definition - then - Chap3.Create_Array_Subtype (Aggr_Type); - end if; + Chap3.Create_Composite_Subtype (Aggr_Type); -- FIXME: this may be not necessary Tinfo := Get_Info (Aggr_Type); diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb index 4b57570f6..ef2f79d4f 100644 --- a/src/vhdl/translate/trans-chap8.adb +++ b/src/vhdl/translate/trans-chap8.adb @@ -2811,7 +2811,7 @@ package body Trans.Chap8 is -- FIXME: do not allocate bounds if static. if Mode = Mode_Value then if Get_Type_Staticness (Actual_Type) >= Globally then - Chap3.Create_Array_Subtype (Actual_Type); + Chap3.Create_Composite_Subtype (Actual_Type); Bounds := Chap3.Get_Composite_Type_Bounds (Actual_Type); Chap3.Translate_Object_Allocation |