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| author | Tristan Gingold <tgingold@free.fr> | 2021-08-22 22:14:44 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2021-08-23 07:24:03 +0200 |
| commit | a20bce35a9ee05e8e2a4599e510d08fe2fd9ebc5 (patch) | |
| tree | dec9edf5c3410fa2efbdb7849e62b0b66a11764d /src/vhdl/translate/trans-chap8.adb | |
| parent | bbdff59e4e68e89033843f9344814c957b0b6250 (diff) | |
| download | ghdl-a20bce35a9ee05e8e2a4599e510d08fe2fd9ebc5.tar.gz ghdl-a20bce35a9ee05e8e2a4599e510d08fe2fd9ebc5.tar.bz2 ghdl-a20bce35a9ee05e8e2a4599e510d08fe2fd9ebc5.zip | |
Rework inertial associations.
Fix #1625
Fix #1672
Diffstat (limited to 'src/vhdl/translate/trans-chap8.adb')
| -rw-r--r-- | src/vhdl/translate/trans-chap8.adb | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb index 3626460aa..d9616fa97 100644 --- a/src/vhdl/translate/trans-chap8.adb +++ b/src/vhdl/translate/trans-chap8.adb @@ -4745,6 +4745,14 @@ package body Trans.Chap8 is end; end Translate_Waveform_Assignment; + procedure Translate_Inertial_Assignment + (Targ : Mnode; Targ_Type : Iir; Val : Mnode; Assoc : Iir) is + begin + Signal_Assign_Line := Get_Line_Number (Assoc); + + Gen_Simple_Signal_Assign (Targ, Targ_Type, M2E (Val)); + end Translate_Inertial_Assignment; + procedure Translate_Simple_Signal_Assignment_Statement (Stmt : Iir) is Target : constant Iir := Strip_Reference_Name (Get_Target (Stmt)); |