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author | Tristan Gingold <tgingold@free.fr> | 2019-10-15 18:49:37 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-10-15 18:49:37 +0200 |
commit | bbdbb49e9c72b322eb2b07cd07ea164a508be7c3 (patch) | |
tree | f1049fcf8f140aefd0d87f6b32d13ebbbb075d39 /src/synth | |
parent | 035c971dbfeb6ed63226fc66095a0c8555fb52ef (diff) | |
download | ghdl-bbdbb49e9c72b322eb2b07cd07ea164a508be7c3.tar.gz ghdl-bbdbb49e9c72b322eb2b07cd07ea164a508be7c3.tar.bz2 ghdl-bbdbb49e9c72b322eb2b07cd07ea164a508be7c3.zip |
vhdl: handle cover and restrict within vunit.
Diffstat (limited to 'src/synth')
-rw-r--r-- | src/synth/synth-stmts.adb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb index 7ebeb1a5b..292934645 100644 --- a/src/synth/synth-stmts.adb +++ b/src/synth/synth-stmts.adb @@ -2591,6 +2591,8 @@ package body Synth.Stmts is Synth_Psl_Assert_Directive (Syn_Inst, Item); when Iir_Kind_Psl_Assume_Directive => Synth_Psl_Assume_Directive (Syn_Inst, Item); + when Iir_Kind_Psl_Restrict_Directive => + Synth_Psl_Restrict_Directive (Syn_Inst, Item); when Iir_Kind_Psl_Cover_Directive => Synth_Psl_Cover_Directive (Syn_Inst, Item); when others => |