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| author | Tristan Gingold <tgingold@free.fr> | 2023-01-11 19:08:39 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2023-01-12 05:54:19 +0100 |
| commit | 902df03a4cdcbcfaca9379e68fb52062aeaeb7ca (patch) | |
| tree | 2598faebce456e3c67f69535b2d4ce608880009e /src/synth | |
| parent | fb7ef864c019d325f3fc37125e6d6cdc50ae4b83 (diff) | |
| download | ghdl-902df03a4cdcbcfaca9379e68fb52062aeaeb7ca.tar.gz ghdl-902df03a4cdcbcfaca9379e68fb52062aeaeb7ca.tar.bz2 ghdl-902df03a4cdcbcfaca9379e68fb52062aeaeb7ca.zip | |
synth: use same wording for direction mismatch as simulation
Diffstat (limited to 'src/synth')
| -rw-r--r-- | src/synth/synth-vhdl_expr.adb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/synth/synth-vhdl_expr.adb b/src/synth/synth-vhdl_expr.adb index ec0cd28bb..56ecbb310 100644 --- a/src/synth/synth-vhdl_expr.adb +++ b/src/synth/synth-vhdl_expr.adb @@ -1223,7 +1223,8 @@ package body Synth.Vhdl_Expr is Len : Uns32; begin if Pfx_Bnd.Dir /= Dir then - Error_Msg_Synth (Syn_Inst, Name, "direction mismatch in slice"); + Error_Msg_Synth (Syn_Inst, Name, + "slice direction doesn't match index direction"); Off := (0, 0); if Dir = Dir_To then Res_Bnd := (Dir => Dir_To, Left => 1, Right => 0, Len => 0); |