aboutsummaryrefslogtreecommitdiffstats
path: root/src/synth
diff options
context:
space:
mode:
authorTristan Gingold <tgingold@free.fr>2022-10-06 20:35:44 +0200
committerTristan Gingold <tgingold@free.fr>2022-10-06 20:35:44 +0200
commit7d49ce2362ef0c9c690db4616cbcd202b6f72300 (patch)
tree7bd9f3fa9826cb6a744a81fb0a4e369c5dc06d03 /src/synth
parent04f4f5139962f51dd87e8ff5f497deef10caef17 (diff)
downloadghdl-7d49ce2362ef0c9c690db4616cbcd202b6f72300.tar.gz
ghdl-7d49ce2362ef0c9c690db4616cbcd202b6f72300.tar.bz2
ghdl-7d49ce2362ef0c9c690db4616cbcd202b6f72300.zip
simul: improve debugger (display of signals value)
Diffstat (limited to 'src/synth')
-rw-r--r--src/synth/elab-debugger.adb4
-rw-r--r--src/synth/elab-vhdl_debug.adb50
-rw-r--r--src/synth/elab-vhdl_debug.ads5
3 files changed, 48 insertions, 11 deletions
diff --git a/src/synth/elab-debugger.adb b/src/synth/elab-debugger.adb
index 66b1fe835..441a64eb1 100644
--- a/src/synth/elab-debugger.adb
+++ b/src/synth/elab-debugger.adb
@@ -448,6 +448,10 @@ package body Elab.Debugger is
P : Natural;
begin
P := Skip_Blanks (Line);
+ if P > Line'Last then
+ Put_Line ("missing subprogram name");
+ return;
+ end if;
if Line (P) = '"' then
-- An operator name.
declare
diff --git a/src/synth/elab-vhdl_debug.adb b/src/synth/elab-vhdl_debug.adb
index 8db0f2058..d47c310f0 100644
--- a/src/synth/elab-vhdl_debug.adb
+++ b/src/synth/elab-vhdl_debug.adb
@@ -55,23 +55,51 @@ package body Elab.Vhdl_Debug is
& Natural'Image (Line));
end Put_Stmt_Trace;
+ procedure Disp_Integer_Value (Val : Int64; Btype : Node)
+ is
+ pragma Unreferenced (Btype);
+ begin
+ Put_Int64 (Val);
+ end Disp_Integer_Value;
+
+ procedure Disp_Enumeration_Value (Val : Int64; Btype : Node)
+ is
+ Pos : constant Natural := Natural (Val);
+ Enums : constant Node_Flist :=
+ Get_Enumeration_Literal_List (Btype);
+ Id : constant Name_Id :=
+ Get_Identifier (Get_Nth_Element (Enums, Pos));
+ begin
+ Put (Name_Table.Image (Id));
+ end Disp_Enumeration_Value;
+
+ procedure Disp_Physical_Value (Val : Int64; Btype : Node)
+ is
+ Id : constant Name_Id := Get_Identifier (Get_Primary_Unit (Btype));
+ begin
+ Put_Int64 (Val);
+ Put (' ');
+ Put (Name_Table.Image (Id));
+ end Disp_Physical_Value;
+
+ procedure Disp_Float_Value (Val : Fp64; Btype : Node)
+ is
+ pragma Unreferenced (Btype);
+ begin
+ Put_Fp64 (Val);
+ end Disp_Float_Value;
+
procedure Disp_Discrete_Value (Val : Int64; Btype : Node) is
begin
case Get_Kind (Btype) is
when Iir_Kind_Integer_Type_Definition
| Iir_Kind_Integer_Subtype_Definition =>
- Put_Int64 (Val);
+ Disp_Integer_Value (Val, Btype);
when Iir_Kind_Enumeration_Type_Definition
| Iir_Kind_Enumeration_Subtype_Definition =>
- declare
- Pos : constant Natural := Natural (Val);
- Enums : constant Node_Flist :=
- Get_Enumeration_Literal_List (Btype);
- Id : constant Name_Id :=
- Get_Identifier (Get_Nth_Element (Enums, Pos));
- begin
- Put (Name_Table.Image (Id));
- end;
+ Disp_Enumeration_Value (Val, Btype);
+ when Iir_Kind_Physical_Type_Definition =>
+ Disp_Physical_Value (Val, Btype);
when others =>
Vhdl.Errors.Error_Kind ("disp_discrete_value", Btype);
end case;
@@ -158,7 +186,7 @@ package body Elab.Vhdl_Debug is
if I /= 1 then
Put (", ");
end if;
- Disp_Value_Array ((Mem.Typ,
+ Disp_Value_Array ((Mem.Typ.Arr_El,
Mem.Mem + Size_Type (Len - I) * Stride),
A_Type);
end loop;
diff --git a/src/synth/elab-vhdl_debug.ads b/src/synth/elab-vhdl_debug.ads
index a1200d621..f9dd900c0 100644
--- a/src/synth/elab-vhdl_debug.ads
+++ b/src/synth/elab-vhdl_debug.ads
@@ -27,6 +27,11 @@ package Elab.Vhdl_Debug is
procedure Disp_Memtyp (M : Memtyp; Vtype : Node);
function Walk_Declarations (Cb : Walk_Cb) return Walk_Status;
+ procedure Disp_Integer_Value (Val : Int64; Btype : Node);
+ procedure Disp_Enumeration_Value (Val : Int64; Btype : Node);
+ procedure Disp_Physical_Value (Val : Int64; Btype : Node);
+ procedure Disp_Float_Value (Val : Fp64; Btype : Node);
+
procedure Disp_Discrete_Value (Val : Int64; Btype : Node);
procedure Disp_Declaration_Objects