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author | Tristan Gingold <tgingold@free.fr> | 2019-07-25 05:48:04 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-07-25 05:48:04 +0200 |
commit | dbdc6a93ab37ad44537d250ec216d682c090b5f0 (patch) | |
tree | 34054ef3be6e34d5414667a164409215ee72182e /src/synth/synth-insts.adb | |
parent | e5aa8272090bba9224b6e544113ff8b2bce0dd33 (diff) | |
download | ghdl-dbdc6a93ab37ad44537d250ec216d682c090b5f0.tar.gz ghdl-dbdc6a93ab37ad44537d250ec216d682c090b5f0.tar.bz2 ghdl-dbdc6a93ab37ad44537d250ec216d682c090b5f0.zip |
synth: save and display locations for instances.
Diffstat (limited to 'src/synth/synth-insts.adb')
-rw-r--r-- | src/synth/synth-insts.adb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/synth/synth-insts.adb b/src/synth/synth-insts.adb index ec63d2d1d..7c178b4f4 100644 --- a/src/synth/synth-insts.adb +++ b/src/synth/synth-insts.adb @@ -678,6 +678,7 @@ package body Synth.Insts is W := Get_Output_Desc (Get_Module (Self_Inst), Idx).W; pragma Assert (W = Val.W_Bound.Len); Value := Builders.Build_Output (Build_Context, W); + Set_Location (Value, Inter); Inp := Get_Input (Self_Inst, Idx); Connect (Inp, Value); Set_Wire_Gate (Val.W, Value); |