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authorTristan Gingold <tgingold@free.fr>2019-07-17 06:34:15 +0200
committerTristan Gingold <tgingold@free.fr>2019-07-17 06:34:15 +0200
commit3ad0b11d266aa7d5c594f76722fb7fa67ec039de (patch)
tree746e1b4a09bff0a235c2665540363c8e0f9a87fb /src/synth/synth-insts.adb
parent3a1f9c3fa9ef0224c4add88cd6020d8a933426ee (diff)
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synth: make type Wire_Id_Record private.
Diffstat (limited to 'src/synth/synth-insts.adb')
-rw-r--r--src/synth/synth-insts.adb6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/synth/synth-insts.adb b/src/synth/synth-insts.adb
index a45ed8590..d5d3f4bf3 100644
--- a/src/synth/synth-insts.adb
+++ b/src/synth/synth-insts.adb
@@ -429,7 +429,7 @@ package body Synth.Insts is
Value := Builders.Build_Signal
(Build_Context, New_Sname (No_Sname, Get_Identifier (Inter)),
Val.W_Bound.Len);
- Wire_Id_Table.Table (Val.W).Gate := Value;
+ Set_Wire_Gate (Val.W, Value);
when others =>
raise Internal_Error;
end case;
@@ -656,7 +656,7 @@ package body Synth.Insts is
case Val.Kind is
when Value_Wire =>
Val.W := Alloc_Wire (Wire_Input, Inter);
- Wire_Id_Table.Table (Val.W).Gate := Get_Output (Self_Inst, Idx);
+ Set_Wire_Gate (Val.W, Get_Output (Self_Inst, Idx));
Idx := Idx + 1;
when others =>
raise Internal_Error;
@@ -681,7 +681,7 @@ package body Synth.Insts is
Value := Builders.Build_Output (Build_Context, W);
Inp := Get_Input (Self_Inst, Idx);
Connect (Inp, Value);
- Wire_Id_Table.Table (Val.W).Gate := Value;
+ Set_Wire_Gate (Val.W, Value);
Idx := Idx + 1;
when others =>
raise Internal_Error;