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authorTristan Gingold <tgingold@free.fr>2020-12-13 10:12:34 +0100
committerTristan Gingold <tgingold@free.fr>2020-12-13 10:12:34 +0100
commit239f394ee7d731d96672387fd564808091914883 (patch)
treef7fd058bc6c68ab2f037e50c39c23c084cd8166b /src/synth/synth-ieee-std_logic_1164.adb
parentdfee046e8511cca96d95163d9bf0d4e9b0ad70ad (diff)
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synth-static_oper: handle to_stdulogic. For #1534
Diffstat (limited to 'src/synth/synth-ieee-std_logic_1164.adb')
-rw-r--r--src/synth/synth-ieee-std_logic_1164.adb13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/synth/synth-ieee-std_logic_1164.adb b/src/synth/synth-ieee-std_logic_1164.adb
index 7249164b4..6aaaa7cdc 100644
--- a/src/synth/synth-ieee-std_logic_1164.adb
+++ b/src/synth/synth-ieee-std_logic_1164.adb
@@ -28,4 +28,17 @@ package body Synth.Ieee.Std_Logic_1164 is
begin
Write_U8 (M + Size_Type (Off), Std_Ulogic'Pos (Val));
end Write_Std_Logic;
+
+ function Read_Bit_To_Std_Logic (M : Memory_Ptr; Off : Uns32)
+ return Std_Ulogic is
+ begin
+ case Read_U8 (M + Size_Type (Off)) is
+ when 0 =>
+ return '0';
+ when 1 =>
+ return '1';
+ when others =>
+ raise Constraint_Error;
+ end case;
+ end Read_Bit_To_Std_Logic;
end Synth.Ieee.Std_Logic_1164;