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| author | Tristan Gingold <tgingold@free.fr> | 2021-05-07 19:47:46 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2021-05-07 19:47:46 +0200 |
| commit | 7df971683e4637b146a26a9995eb7ebb0f3588bc (patch) | |
| tree | e22dfdb91389177419ae9a7b224b9c2403418804 /src/std_names.adb | |
| parent | 29aa770398bd26fb82f6322e887f8313de77f96f (diff) | |
| download | ghdl-7df971683e4637b146a26a9995eb7ebb0f3588bc.tar.gz ghdl-7df971683e4637b146a26a9995eb7ebb0f3588bc.tar.bz2 ghdl-7df971683e4637b146a26a9995eb7ebb0f3588bc.zip | |
std_names: add full and parallel case.
Diffstat (limited to 'src/std_names.adb')
| -rw-r--r-- | src/std_names.adb | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/std_names.adb b/src/std_names.adb index b9eeea05e..ffbfce1ef 100644 --- a/src/std_names.adb +++ b/src/std_names.adb @@ -792,7 +792,7 @@ package body Std_Names is Def ("valueof", Name_Valueof); Def ("valueOf", Name_uValueof); - -- VHDL special comments + -- Special comments Def ("psl", Name_Psl); Def ("pragma", Name_Pragma); Def ("synthesis", Name_Synthesis); @@ -803,6 +803,8 @@ package body Std_Names is Def ("synthesis_off", Name_Synthesis_Off); Def ("synthesis_on", Name_Synthesis_On); Def ("off", Name_Off); + Def ("full_case", Name_Full_Case); + Def ("parallel_case", Name_Parallel_Case); -- PSL keywords Def ("a", Name_A); |