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| author | Tristan Gingold <tgingold@free.fr> | 2019-06-28 18:30:22 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-06-28 18:30:22 +0200 |
| commit | 12e5e54325111f11d7bb6283eed7fd4a3760a899 (patch) | |
| tree | 1a392cb18edb4ec1e1a3e641cd434eb152169388 /src/std_names.adb | |
| parent | 1048f7b66fc74c09e7fc2afc2df1bac6516c9912 (diff) | |
| download | ghdl-12e5e54325111f11d7bb6283eed7fd4a3760a899.tar.gz ghdl-12e5e54325111f11d7bb6283eed7fd4a3760a899.tar.bz2 ghdl-12e5e54325111f11d7bb6283eed7fd4a3760a899.zip | |
std_names: add names for math_real.
Diffstat (limited to 'src/std_names.adb')
| -rw-r--r-- | src/std_names.adb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/std_names.adb b/src/std_names.adb index f19556bc1..3a5cb9c9f 100644 --- a/src/std_names.adb +++ b/src/std_names.adb @@ -625,6 +625,9 @@ package body Std_Names is Def ("to_integer", Name_To_Integer); Def ("to_unsigned", Name_To_Unsigned); Def ("to_signed", Name_To_Signed); + Def ("math_real", Name_Math_Real); + Def ("ceil", Name_Ceil); + Def ("log2", Name_Log2); -- Verilog directives Def ("define", Name_Define); |