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authorTristan Gingold <tgingold@free.fr>2020-02-10 07:00:31 +0100
committerTristan Gingold <tgingold@free.fr>2020-02-10 07:00:31 +0100
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synth: rework (again) memory inference.
Preliminary work to support multi-clock memories. Strengthen and fix fallout of Check_Connected. Rename synth.inference to netlists.inference.
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