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| author | Tristan Gingold <tgingold@free.fr> | 2021-12-06 20:47:04 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2021-12-06 20:47:54 +0100 |
| commit | 88425cb365578cacd46939d93f837b2ac7b0d5e8 (patch) | |
| tree | 2814506e2fd3ea50a5774b04faf53725f18fb82c /src/ghdldrv | |
| parent | c7943754f3fbab8e61fed389f4c3f3918ec37332 (diff) | |
| download | ghdl-88425cb365578cacd46939d93f837b2ac7b0d5e8.tar.gz ghdl-88425cb365578cacd46939d93f837b2ac7b0d5e8.tar.bz2 ghdl-88425cb365578cacd46939d93f837b2ac7b0d5e8.zip | |
synth: add --latches option to enable latches. Fix #938
Diffstat (limited to 'src/ghdldrv')
| -rw-r--r-- | src/ghdldrv/ghdlsynth.adb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/ghdldrv/ghdlsynth.adb b/src/ghdldrv/ghdlsynth.adb index 669588132..cfc5f281b 100644 --- a/src/ghdldrv/ghdlsynth.adb +++ b/src/ghdldrv/ghdlsynth.adb @@ -45,6 +45,7 @@ with Netlists.Disp_Vhdl; with Netlists.Disp_Verilog; with Netlists.Disp_Dot; with Netlists.Errors; +with Netlists.Inference; with Elab.Vhdl_Context; use Elab.Vhdl_Context; with Elab.Vhdl_Insts; @@ -155,6 +156,8 @@ package body Ghdlsynth is Synth.Flags.Flag_Formal := False; elsif Option = "--formal" then Synth.Flags.Flag_Formal := True; + elsif Option = "--latches" then + Netlists.Inference.Flag_Latches := True; elsif Option = "--no-assert-cover" then Synth.Flags.Flag_Assert_Cover := False; elsif Option = "--assert-cover" then |