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author | Tristan Gingold <tgingold@free.fr> | 2019-05-05 07:49:25 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-05-05 08:05:11 +0200 |
commit | 85d360929d13e6b0bcb082f144883a43f402ce22 (patch) | |
tree | f8d8135e12393588b7704318f26304dfab272658 /src/ghdldrv/ghdlsimul.adb | |
parent | 3c48cc2a70085eef63718e622b3d1a7b75a2f36f (diff) | |
download | ghdl-85d360929d13e6b0bcb082f144883a43f402ce22.tar.gz ghdl-85d360929d13e6b0bcb082f144883a43f402ce22.tar.bz2 ghdl-85d360929d13e6b0bcb082f144883a43f402ce22.zip |
vhdl: move std_standard package to vhdl child.
Diffstat (limited to 'src/ghdldrv/ghdlsimul.adb')
-rw-r--r-- | src/ghdldrv/ghdlsimul.adb | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/ghdldrv/ghdlsimul.adb b/src/ghdldrv/ghdlsimul.adb index cc968048f..b465ed8cc 100644 --- a/src/ghdldrv/ghdlsimul.adb +++ b/src/ghdldrv/ghdlsimul.adb @@ -26,7 +26,7 @@ with Types; with Flags; with Name_Table; with Errorout; use Errorout; -with Std_Package; +with Vhdl.Std_Package; with Libraries; with Vhdl.Canon; with Vhdl.Configuration; @@ -61,14 +61,14 @@ package body Ghdlsimul is end if; if Time_Resolution /= 'a' then - Std_Package.Set_Time_Resolution (Time_Resolution); + Vhdl.Std_Package.Set_Time_Resolution (Time_Resolution); end if; if Analyze_Only then return; end if; - Simul.Annotations.Annotate (Std_Package.Std_Standard_Unit); + Simul.Annotations.Annotate (Vhdl.Std_Package.Std_Standard_Unit); Vhdl.Canon.Canon_Flag_Add_Labels := True; Vhdl.Canon.Canon_Flag_Sequentials_Stmts := True; |