diff options
author | Tristan Gingold <tgingold@free.fr> | 2014-09-05 06:05:19 +0200 |
---|---|---|
committer | Tristan Gingold <tgingold@free.fr> | 2014-09-05 06:05:19 +0200 |
commit | fe6ff5794545ce9f7d00985b55cf9d5b18725ea0 (patch) | |
tree | 9a61d61c8981ac292c27a94a2cf5c9aa1bf62143 /simulate | |
parent | 6d8c5299f20b4cd8f1e049f7eea454c00a3102b7 (diff) | |
download | ghdl-fe6ff5794545ce9f7d00985b55cf9d5b18725ea0.tar.gz ghdl-fe6ff5794545ce9f7d00985b55cf9d5b18725ea0.tar.bz2 ghdl-fe6ff5794545ce9f7d00985b55cf9d5b18725ea0.zip |
First run (using mcode) of OSVVM_2014_01.
Diffstat (limited to 'simulate')
-rw-r--r-- | simulate/annotations.adb | 2 | ||||
-rw-r--r-- | simulate/debugger.adb | 2 | ||||
-rw-r--r-- | simulate/elaboration.adb | 14 | ||||
-rw-r--r-- | simulate/execution.adb | 220 | ||||
-rw-r--r-- | simulate/file_operation.adb | 8 | ||||
-rw-r--r-- | simulate/iir_values.adb | 54 | ||||
-rw-r--r-- | simulate/iir_values.ads | 18 | ||||
-rw-r--r-- | simulate/simulation.adb | 44 | ||||
-rw-r--r-- | simulate/simulation.ads | 2 |
9 files changed, 182 insertions, 182 deletions
diff --git a/simulate/annotations.adb b/simulate/annotations.adb index a0b9ae8f5..4377ffd1f 100644 --- a/simulate/annotations.adb +++ b/simulate/annotations.adb @@ -297,7 +297,7 @@ package body Annotations is then Set_Info (Def, new Sim_Info_Type'(Kind => Kind_Scalar_Type, - Scalar_Mode => Iir_Value_B2)); + Scalar_Mode => Iir_Value_B1)); else Set_Info (Def, new Sim_Info_Type'(Kind => Kind_Scalar_Type, diff --git a/simulate/debugger.adb b/simulate/debugger.adb index 1677efa58..5a43533d6 100644 --- a/simulate/debugger.adb +++ b/simulate/debugger.adb @@ -318,7 +318,7 @@ package body Debugger is when Iir_Value_I64 | Iir_Value_F64 | Iir_Value_E32 - | Iir_Value_B2 + | Iir_Value_B1 | Iir_Value_Access => Disp_Iir_Value (Value, A_Type); when Iir_Value_Array => diff --git a/simulate/elaboration.adb b/simulate/elaboration.adb index c0e5d903d..391798fa2 100644 --- a/simulate/elaboration.adb +++ b/simulate/elaboration.adb @@ -87,7 +87,7 @@ package body Elaboration is when Iir_Value_I64 | Iir_Value_F64 - | Iir_Value_B2 + | Iir_Value_B1 | Iir_Value_E32 => Res := Create_Signal_Value (null); @@ -146,10 +146,10 @@ package body Elaboration is begin if Kind = Implicit_Transaction then T := 0; - Init := Create_B2_Value (False); + Init := Create_B1_Value (False); else T := Execute_Time_Attribute (Instance, Signal); - Init := Create_B2_Value (False); + Init := Create_B1_Value (False); end if; Sig := Create_Signal_Value (null); Instance.Objects (Info.Slot) := Sig; @@ -448,8 +448,8 @@ package body Elaboration is Res := Bounds.Left; else case Get_Info (Get_Base_Type (Decl)).Scalar_Mode is - when Iir_Value_B2 => - Res := Create_B2_Value (False); + when Iir_Value_B1 => + Res := Create_B1_Value (False); when Iir_Value_E32 => Res := Create_E32_Value (0); when Iir_Value_I64 => @@ -1222,7 +1222,7 @@ package body Elaboration is Sig := Create_Signal_Value (null); Instance.Objects (Info.Slot) := Sig; Instance.Objects (Info.Slot + 1) := - Unshare (Create_B2_Value (False), Instance_Pool); + Unshare (Create_B1_Value (False), Instance_Pool); Signals_Table.Append ((Kind => Guard_Signal, Decl => Guard, @@ -1473,7 +1473,7 @@ package body Elaboration is -- evaluates to TRUE, and no block statement otherwise. Scheme := Get_Generation_Scheme (Generate); Lit := Execute_Expression (Instance, Scheme); - if Lit.B2 /= True then + if Lit.B1 /= True then return; end if; diff --git a/simulate/execution.adb b/simulate/execution.adb index af34e966e..304f3bb12 100644 --- a/simulate/execution.adb +++ b/simulate/execution.adb @@ -204,8 +204,8 @@ package body Execution is case Mode is when Iir_Value_E32 => return Create_E32_Value (Ghdl_E32 (Pos)); - when Iir_Value_B2 => - return Create_B2_Value (Ghdl_B2'Val (Pos)); + when Iir_Value_B1 => + return Create_B1_Value (Ghdl_B1'Val (Pos)); when others => raise Internal_Error; end case; @@ -259,8 +259,8 @@ package body Execution is Pos : Natural; begin case Val.Kind is - when Iir_Value_B2 => - Pos := Ghdl_B2'Pos (Val.B2); + when Iir_Value_B1 => + Pos := Ghdl_B1'Pos (Val.B1); when Iir_Value_E32 => Pos := Ghdl_E32'Pos (Val.E32); when others => @@ -410,7 +410,7 @@ package body Execution is N := 1; Pos := Str'Last; for I in reverse Val.Val_Array.V'Range loop - V := V + Ghdl_B2'Pos (Val.Val_Array.V (I).B2) * N; + V := V + Ghdl_B1'Pos (Val.Val_Array.V (I).B1) * N; N := N * 2; if N = Base or else I = Val.Val_Array.V'First then Str (Pos) := Hex_Chars (V); @@ -572,54 +572,54 @@ package body Execution is when Iir_Predefined_Bit_And | Iir_Predefined_Boolean_And => - if Left.B2 = Lit_Enum_0.B2 then + if Left.B1 = Lit_Enum_0.B1 then -- Short circuit operator. Result := Lit_Enum_0; else Eval_Right; - Result := Boolean_To_Lit (Right.B2 = Lit_Enum_1.B2); + Result := Boolean_To_Lit (Right.B1 = Lit_Enum_1.B1); end if; when Iir_Predefined_Bit_Nand | Iir_Predefined_Boolean_Nand => - if Left.B2 = Lit_Enum_0.B2 then + if Left.B1 = Lit_Enum_0.B1 then -- Short circuit operator. Result := Lit_Enum_1; else Eval_Right; - Result := Boolean_To_Lit (Right.B2 = Lit_Enum_0.B2); + Result := Boolean_To_Lit (Right.B1 = Lit_Enum_0.B1); end if; when Iir_Predefined_Bit_Or | Iir_Predefined_Boolean_Or => - if Left.B2 = Lit_Enum_1.B2 then + if Left.B1 = Lit_Enum_1.B1 then -- Short circuit operator. Result := Lit_Enum_1; else Eval_Right; - Result := Boolean_To_Lit (Right.B2 = Lit_Enum_1.B2); + Result := Boolean_To_Lit (Right.B1 = Lit_Enum_1.B1); end if; when Iir_Predefined_Bit_Nor | Iir_Predefined_Boolean_Nor => - if Left.B2 = Lit_Enum_1.B2 then + if Left.B1 = Lit_Enum_1.B1 then -- Short circuit operator. Result := Lit_Enum_0; else Eval_Right; - Result := Boolean_To_Lit (Right.B2 = Lit_Enum_0.B2); + Result := Boolean_To_Lit (Right.B1 = Lit_Enum_0.B1); end if; when Iir_Predefined_Bit_Xor | Iir_Predefined_Boolean_Xor => Eval_Right; - Result := Boolean_To_Lit (Left.B2 /= Right.B2); + Result := Boolean_To_Lit (Left.B1 /= Right.B1); when Iir_Predefined_Bit_Xnor | Iir_Predefined_Boolean_Xnor => Eval_Right; - Result := Boolean_To_Lit (Left.B2 = Right.B2); + Result := Boolean_To_Lit (Left.B1 = Right.B1); when Iir_Predefined_Bit_Not | Iir_Predefined_Boolean_Not => - Result := Boolean_To_Lit (Operand.B2 = Lit_Enum_0.B2); + Result := Boolean_To_Lit (Operand.B1 = Lit_Enum_0.B1); when Iir_Predefined_Bit_Condition => - Result := Boolean_To_Lit (Operand.B2 = Lit_Enum_1.B2); + Result := Boolean_To_Lit (Operand.B1 = Lit_Enum_1.B1); when Iir_Predefined_Array_Sll | Iir_Predefined_Array_Srl @@ -691,8 +691,8 @@ package body Execution is when Iir_Predefined_Enum_Less => Eval_Right; case Left.Kind is - when Iir_Value_B2 => - Result := Boolean_To_Lit (Left.B2 < Right.B2); + when Iir_Value_B1 => + Result := Boolean_To_Lit (Left.B1 < Right.B1); when Iir_Value_E32 => Result := Boolean_To_Lit (Left.E32 < Right.E32); when others => @@ -701,8 +701,8 @@ package body Execution is when Iir_Predefined_Enum_Greater => Eval_Right; case Left.Kind is - when Iir_Value_B2 => - Result := Boolean_To_Lit (Left.B2 > Right.B2); + when Iir_Value_B1 => + Result := Boolean_To_Lit (Left.B1 > Right.B1); when Iir_Value_E32 => Result := Boolean_To_Lit (Left.E32 > Right.E32); when others => @@ -711,8 +711,8 @@ package body Execution is when Iir_Predefined_Enum_Less_Equal => Eval_Right; case Left.Kind is - when Iir_Value_B2 => - Result := Boolean_To_Lit (Left.B2 <= Right.B2); + when Iir_Value_B1 => + Result := Boolean_To_Lit (Left.B1 <= Right.B1); when Iir_Value_E32 => Result := Boolean_To_Lit (Left.E32 <= Right.E32); when others => @@ -721,8 +721,8 @@ package body Execution is when Iir_Predefined_Enum_Greater_Equal => Eval_Right; case Left.Kind is - when Iir_Value_B2 => - Result := Boolean_To_Lit (Left.B2 >= Right.B2); + when Iir_Value_B1 => + Result := Boolean_To_Lit (Left.B1 >= Right.B1); when Iir_Value_E32 => Result := Boolean_To_Lit (Left.E32 >= Right.E32); when others => @@ -928,181 +928,181 @@ package body Execution is when Iir_Predefined_TF_Array_And => Eval_Array; for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - Result.Val_Array.V (I).B2 and Right.Val_Array.V (I).B2; + Result.Val_Array.V (I).B1 := + Result.Val_Array.V (I).B1 and Right.Val_Array.V (I).B1; end loop; when Iir_Predefined_TF_Array_Nand => Eval_Array; for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - not (Result.Val_Array.V (I).B2 and Right.Val_Array.V (I).B2); + Result.Val_Array.V (I).B1 := + not (Result.Val_Array.V (I).B1 and Right.Val_Array.V (I).B1); end loop; when Iir_Predefined_TF_Array_Or => Eval_Array; for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - Result.Val_Array.V (I).B2 or Right.Val_Array.V (I).B2; + Result.Val_Array.V (I).B1 := + Result.Val_Array.V (I).B1 or Right.Val_Array.V (I).B1; end loop; when Iir_Predefined_TF_Array_Nor => Eval_Array; for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - not (Result.Val_Array.V (I).B2 or Right.Val_Array.V (I).B2); + Result.Val_Array.V (I).B1 := + not (Result.Val_Array.V (I).B1 or Right.Val_Array.V (I).B1); end loop; when Iir_Predefined_TF_Array_Xor => Eval_Array; for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - Result.Val_Array.V (I).B2 xor Right.Val_Array.V (I).B2; + Result.Val_Array.V (I).B1 := + Result.Val_Array.V (I).B1 xor Right.Val_Array.V (I).B1; end loop; when Iir_Predefined_TF_Array_Xnor => Eval_Array; for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - not (Result.Val_Array.V (I).B2 xor Right.Val_Array.V (I).B2); + Result.Val_Array.V (I).B1 := + not (Result.Val_Array.V (I).B1 xor Right.Val_Array.V (I).B1); end loop; when Iir_Predefined_TF_Array_Element_And => Eval_Right; Result := Unshare (Left, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - Result.Val_Array.V (I).B2 and Right.B2; + Result.Val_Array.V (I).B1 := + Result.Val_Array.V (I).B1 and Right.B1; end loop; when Iir_Predefined_TF_Element_Array_And => Eval_Right; Result := Unshare (Right, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - Result.Val_Array.V (I).B2 and Left.B2; + Result.Val_Array.V (I).B1 := + Result.Val_Array.V (I).B1 and Left.B1; end loop; when Iir_Predefined_TF_Array_Element_Or => Eval_Right; Result := Unshare (Left, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - Result.Val_Array.V (I).B2 or Right.B2; + Result.Val_Array.V (I).B1 := + Result.Val_Array.V (I).B1 or Right.B1; end loop; when Iir_Predefined_TF_Element_Array_Or => Eval_Right; Result := Unshare (Right, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - Result.Val_Array.V (I).B2 or Left.B2; + Result.Val_Array.V (I).B1 := + Result.Val_Array.V (I).B1 or Left.B1; end loop; when Iir_Predefined_TF_Array_Element_Xor => Eval_Right; Result := Unshare (Left, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - Result.Val_Array.V (I).B2 xor Right.B2; + Result.Val_Array.V (I).B1 := + Result.Val_Array.V (I).B1 xor Right.B1; end loop; when Iir_Predefined_TF_Element_Array_Xor => Eval_Right; Result := Unshare (Right, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - Result.Val_Array.V (I).B2 xor Left.B2; + Result.Val_Array.V (I).B1 := + Result.Val_Array.V (I).B1 xor Left.B1; end loop; when Iir_Predefined_TF_Array_Element_Nand => Eval_Right; Result := Unshare (Left, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - not (Result.Val_Array.V (I).B2 and Right.B2); + Result.Val_Array.V (I).B1 := + not (Result.Val_Array.V (I).B1 and Right.B1); end loop; when Iir_Predefined_TF_Element_Array_Nand => Eval_Right; Result := Unshare (Right, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - not (Result.Val_Array.V (I).B2 and Left.B2); + Result.Val_Array.V (I).B1 := + not (Result.Val_Array.V (I).B1 and Left.B1); end loop; when Iir_Predefined_TF_Array_Element_Nor => Eval_Right; Result := Unshare (Left, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - not (Result.Val_Array.V (I).B2 or Right.B2); + Result.Val_Array.V (I).B1 := + not (Result.Val_Array.V (I).B1 or Right.B1); end loop; when Iir_Predefined_TF_Element_Array_Nor => Eval_Right; Result := Unshare (Right, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - not (Result.Val_Array.V (I).B2 or Left.B2); + Result.Val_Array.V (I).B1 := + not (Result.Val_Array.V (I).B1 or Left.B1); end loop; when Iir_Predefined_TF_Array_Element_Xnor => Eval_Right; Result := Unshare (Left, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - not (Result.Val_Array.V (I).B2 xor Right.B2); + Result.Val_Array.V (I).B1 := + not (Result.Val_Array.V (I).B1 xor Right.B1); end loop; when Iir_Predefined_TF_Element_Array_Xnor => Eval_Right; Result := Unshare (Right, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := - not (Result.Val_Array.V (I).B2 xor Left.B2); + Result.Val_Array.V (I).B1 := + not (Result.Val_Array.V (I).B1 xor Left.B1); end loop; when Iir_Predefined_TF_Array_Not => -- Need to copy as the result is modified. Result := Unshare (Operand, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop - Result.Val_Array.V (I).B2 := not Result.Val_Array.V (I).B2; + Result.Val_Array.V (I).B1 := not Result.Val_Array.V (I).B1; end loop; when Iir_Predefined_TF_Reduction_And => - Result := Create_B2_Value (True); + Result := Create_B1_Value (True); for I in Operand.Val_Array.V'Range loop - Result.B2 := Result.B2 and Operand.Val_Array.V (I).B2; + Result.B1 := Result.B1 and Operand.Val_Array.V (I).B1; end loop; when Iir_Predefined_TF_Reduction_Nand => - Result := Create_B2_Value (True); + Result := Create_B1_Value (True); for I in Operand.Val_Array.V'Range loop - Result.B2 := Result.B2 and Operand.Val_Array.V (I).B2; + Result.B1 := Result.B1 and Operand.Val_Array.V (I).B1; end loop; - Result.B2 := not Result.B2; + Result.B1 := not Result.B1; when Iir_Predefined_TF_Reduction_Or => - Result := Create_B2_Value (False); + Result := Create_B1_Value (False); for I in Operand.Val_Array.V'Range loop - Result.B2 := Result.B2 or Operand.Val_Array.V (I).B2; + Result.B1 := Result.B1 or Operand.Val_Array.V (I).B1; end loop; when Iir_Predefined_TF_Reduction_Nor => - Result := Create_B2_Value (False); + Result := Create_B1_Value (False); for I in Operand.Val_Array.V'Range loop - Result.B2 := Result.B2 or Operand.Val_Array.V (I).B2; + Result.B1 := Result.B1 or Operand.Val_Array.V (I).B1; end loop; - Result.B2 := not Result.B2; + Result.B1 := not Result.B1; when Iir_Predefined_TF_Reduction_Xor => - Result := Create_B2_Value (False); + Result := Create_B1_Value (False); for I in Operand.Val_Array.V'Range loop - Result.B2 := Result.B2 xor Operand.Val_Array.V (I).B2; + Result.B1 := Result.B1 xor Operand.Val_Array.V (I).B1; end loop; when Iir_Predefined_TF_Reduction_Xnor => - Result := Create_B2_Value (False); + Result := Create_B1_Value (False); for I in Operand.Val_Array.V'Range loop - Result.B2 := Result.B2 xor Operand.Val_Array.V (I).B2; + Result.B1 := Result.B1 xor Operand.Val_Array.V (I).B1; end loop; - Result.B2 := not Result.B2; + Result.B1 := not Result.B1; when Iir_Predefined_Bit_Rising_Edge | Iir_Predefined_Boolean_Rising_Edge => return Boolean_To_Lit (Execute_Event_Attribute (Operand) - and then Execute_Signal_Value (Operand).B2 = True); + and then Execute_Signal_Value (Operand).B1 = True); when Iir_Predefined_Bit_Falling_Edge | Iir_Predefined_Boolean_Falling_Edge => return Boolean_To_Lit (Execute_Event_Attribute (Operand) - and then Execute_Signal_Value (Operand).B2 = False); + and then Execute_Signal_Value (Operand).B1 = False); when Iir_Predefined_Array_Greater => Eval_Right; @@ -1460,21 +1460,21 @@ package body Execution is raise Internal_Error; end if; case Index.Kind is - when Iir_Value_B2 => + when Iir_Value_B1 => case Bounds.Dir is when Iir_To => - if Index.B2 >= Left_Pos.B2 and then - Index.B2 <= Right_Pos.B2 + if Index.B1 >= Left_Pos.B1 and then + Index.B1 <= Right_Pos.B1 then -- to - return Ghdl_B2'Pos (Index.B2) - Ghdl_B2'Pos (Left_Pos.B2); + return Ghdl_B1'Pos (Index.B1) - Ghdl_B1'Pos (Left_Pos.B1); end if; when Iir_Downto => - if Index.B2 <= Left_Pos.B2 and then - Index.B2 >= Right_Pos.B2 + if Index.B1 <= Left_Pos.B1 and then + Index.B1 >= Right_Pos.B1 then -- downto - return Ghdl_B2'Pos (Left_Pos.B2) - Ghdl_B2'Pos (Index.B2); + return Ghdl_B1'Pos (Left_Pos.B1) - Ghdl_B1'Pos (Index.B1); end if; end case; when Iir_Value_E32 => @@ -1582,8 +1582,8 @@ package body Execution is P : constant Iir_Int32 := Get_Enum_Pos (Literal); begin case Element_Mode is - when Iir_Value_B2 => - R := Create_B2_Value (Ghdl_B2'Val (P)); + when Iir_Value_B1 => + R := Create_B1_Value (Ghdl_B1'Val (P)); when Iir_Value_E32 => R := Create_E32_Value (Ghdl_E32'Val (P)); when others => @@ -2231,7 +2231,7 @@ package body Execution is Error_Msg_Constraint (Conv); end if; Res := Create_I64_Value (Ghdl_I64 (Res.F64)); - when Iir_Value_B2 + when Iir_Value_B1 | Iir_Value_E32 | Iir_Value_Range | Iir_Value_Array @@ -2252,7 +2252,7 @@ package body Execution is null; when Iir_Value_I64 => Res := Create_F64_Value (Ghdl_F64 (Res.I64)); - when Iir_Value_B2 + when Iir_Value_B1 | Iir_Value_E32 | Iir_Value_Range | Iir_Value_Array @@ -2298,11 +2298,11 @@ package body Execution is Res : Iir_Value_Literal_Acc; begin case Val.Kind is - when Iir_Value_B2 => - if Val.B2 = False then + when Iir_Value_B1 => + if Val.B1 = False then Error_Msg_Constraint (Expr); end if; - Res := Create_B2_Value (False); + Res := Create_B1_Value (False); when Iir_Value_E32 => if Val.E32 = 0 then Error_Msg_Constraint (Expr); @@ -2327,11 +2327,11 @@ package body Execution is Res : Iir_Value_Literal_Acc; begin case Val.Kind is - when Iir_Value_B2 => - if Val.B2 = True then + when Iir_Value_B1 => + if Val.B1 = True then Error_Msg_Constraint (Expr); end if; - Res := Create_B2_Value (True); + Res := Create_B1_Value (True); when Iir_Value_E32 => if Val.E32 = Ghdl_E32'Last then Error_Msg_Constraint (Expr); @@ -2942,8 +2942,8 @@ package body Execution is Lit : constant Iir_Int32 := Get_Enum_Pos (Expr); begin case Get_Info (Lit_Type).Scalar_Mode is - when Iir_Value_B2 => - return Create_B2_Value (Ghdl_B2'Val (Lit)); + when Iir_Value_B1 => + return Create_B1_Value (Ghdl_B1'Val (Lit)); when Iir_Value_E32 => return Create_E32_Value (Ghdl_E32 (Lit)); when others => @@ -3081,8 +3081,8 @@ package body Execution is null; when Iir_Value_E32 => Res := Create_E32_Value (Ghdl_E32 (Res.I64)); - when Iir_Value_B2 => - Res := Create_B2_Value (Ghdl_B2'Val (Res.I64)); + when Iir_Value_B1 => + Res := Create_B1_Value (Ghdl_B1'Val (Res.I64)); when others => Error_Kind ("execute_expression(val attribute)", Prefix_Type); @@ -3103,8 +3103,8 @@ package body Execution is case Mode is when Iir_Value_I64 => null; - when Iir_Value_B2 => - N_Res := Create_I64_Value (Ghdl_B2'Pos (Res.B2)); + when Iir_Value_B1 => + N_Res := Create_I64_Value (Ghdl_B1'Pos (Res.B1)); Res := N_Res; when Iir_Value_E32 => N_Res := Create_I64_Value (Ghdl_I64 (Res.E32)); @@ -3807,8 +3807,8 @@ package body Execution is if Value.F64 in Low.F64 .. High.F64 then return; end if; - when Iir_Value_B2 => - if Value.B2 in Low.B2 .. High.B2 then + when Iir_Value_B1 => + if Value.B1 in Low.B1 .. High.B1 then return; end if; when others => @@ -4253,8 +4253,8 @@ package body Execution is case Val.Kind is when Iir_Value_E32 => return Val.E32 >= Min.E32 and Val.E32 <= Max.E32; - when Iir_Value_B2 => - return Val.B2 >= Min.B2 and Val.B2 <= Max.B2; + when Iir_Value_B1 => + return Val.B1 >= Min.B1 and Val.B1 <= Max.B1; when Iir_Value_I64 => return Val.I64 >= Min.I64 and Val.I64 <= Max.I64; when others => @@ -4277,12 +4277,12 @@ package body Execution is when Iir_Downto => Val.E32 := Val.E32 - 1; end case; - when Iir_Value_B2 => + when Iir_Value_B1 => case Bounds.Dir is when Iir_To => - Val.B2 := True; + Val.B1 := True; when Iir_Downto => - Val.B2 := False; + Val.B1 := False; end case; when Iir_Value_I64 => case Bounds.Dir is @@ -4398,7 +4398,7 @@ package body Execution is Mark (Marker, Expr_Pool); V := Execute_Expression (Instance, Cond); - Res := V.B2 = True; + Res := V.B1 = True; Release (Marker, Expr_Pool); return Res; end Execute_Condition; diff --git a/simulate/file_operation.adb b/simulate/file_operation.adb index 2404c4066..33700fd6c 100644 --- a/simulate/file_operation.adb +++ b/simulate/file_operation.adb @@ -186,8 +186,8 @@ package body File_Operation is Value: Iir_Value_Literal_Acc) is begin case Value.Kind is - when Iir_Value_B2 => - Ghdl_Write_Scalar (File.File, Ghdl_Ptr (Value.B2'Address), 1); + when Iir_Value_B1 => + Ghdl_Write_Scalar (File.File, Ghdl_Ptr (Value.B1'Address), 1); when Iir_Value_I64 => Ghdl_Write_Scalar (File.File, Ghdl_Ptr (Value.I64'Address), 8); when Iir_Value_E32 => @@ -284,8 +284,8 @@ package body File_Operation is is begin case Value.Kind is - when Iir_Value_B2 => - Ghdl_Read_Scalar (File.File, Ghdl_Ptr (Value.B2'Address), 1); + when Iir_Value_B1 => + Ghdl_Read_Scalar (File.File, Ghdl_Ptr (Value.B1'Address), 1); when Iir_Value_I64 => Ghdl_Read_Scalar (File.File, Ghdl_Ptr (Value.I64'Address), 8); when Iir_Value_E32 => diff --git a/simulate/iir_values.adb b/simulate/iir_values.adb index 93c0ade7c..d80f3bf0a 100644 --- a/simulate/iir_values.adb +++ b/simulate/iir_values.adb @@ -32,8 +32,8 @@ package body Iir_Values is raise Internal_Error; end if; case Left.Kind is - when Iir_Value_B2 => - return Left.B2 = Right.B2; + when Iir_Value_B1 => + return Left.B1 = Right.B1; when Iir_Value_E32 => return Left.E32 = Right.E32; when Iir_Value_I64 => @@ -97,10 +97,10 @@ package body Iir_Values is raise Constraint_Error; end if; case Left.Kind is - when Iir_Value_B2 => - if Left.B2 < Right.B2 then + when Iir_Value_B1 => + if Left.B1 < Right.B1 then return Less; - elsif Left.B2 = Right.B2 then + elsif Left.B1 = Right.B1 then return Equal; else return Greater; @@ -204,9 +204,9 @@ package body Iir_Values is procedure Increment (Val : Iir_Value_Literal_Acc) is begin case Val.Kind is - when Iir_Value_B2 => - if Val.B2 = False then - Val.B2 := True; + when Iir_Value_B1 => + if Val.B1 = False then + Val.B1 := True; else raise Constraint_Error; end if; @@ -249,8 +249,8 @@ package body Iir_Values is for I in Dest.Val_Record.V'Range loop Store (Dest.Val_Record.V (I), Src.Val_Record.V (I)); end loop; - when Iir_Value_B2 => - Dest.B2 := Src.B2; + when Iir_Value_B1 => + Dest.B1 := Src.B1; when Iir_Value_E32 => Dest.E32 := Src.E32; when Iir_Value_I64 => @@ -306,7 +306,7 @@ package body Iir_Values is if Src.Kind /= Dest.Kind then raise Internal_Error; end if; - when Iir_Value_B2 + when Iir_Value_B1 | Iir_Value_E32 | Iir_Value_I64 | Iir_Value_F64 @@ -366,14 +366,14 @@ package body Iir_Values is (Kind => Iir_Value_Protected, Prot => Prot))); end Create_Protected_Value; - function Create_B2_Value (Val : Ghdl_B2) return Iir_Value_Literal_Acc + function Create_B1_Value (Val : Ghdl_B1) return Iir_Value_Literal_Acc is - subtype B2_Value is Iir_Value_Literal (Iir_Value_B2); - function Alloc is new Alloc_On_Pool_Addr (B2_Value); + subtype B1_Value is Iir_Value_Literal (Iir_Value_B1); + function Alloc is new Alloc_On_Pool_Addr (B1_Value); begin return To_Iir_Value_Literal_Acc - (Alloc (Current_Pool, (Kind => Iir_Value_B2, B2 => Val))); - end Create_B2_Value; + (Alloc (Current_Pool, (Kind => Iir_Value_B1, B1 => Val))); + end Create_B1_Value; function Create_E32_Value (Val : Ghdl_E32) return Iir_Value_Literal_Acc is @@ -461,9 +461,9 @@ package body Iir_Values is end case; case (Low.Kind) is - when Iir_Value_B2 => - if High.B2 >= Low.B2 then - Len := Ghdl_B2'Pos (High.B2) - Ghdl_B2'Pos (Low.B2) + 1; + when Iir_Value_B1 => + if High.B1 >= Low.B1 then + Len := Ghdl_B1'Pos (High.B1) - Ghdl_B1'Pos (Low.B1) + 1; else Len := 0; end if; @@ -608,8 +608,8 @@ package body Iir_Values is return Create_I64_Value (Src.I64); when Iir_Value_F64 => return Create_F64_Value (Src.F64); - when Iir_Value_B2 => - return Create_B2_Value (Src.B2); + when Iir_Value_B1 => + return Create_B1_Value (Src.B1); when Iir_Value_Access => return Create_Access_Value (Src.Val_Access); when Iir_Value_Array => @@ -749,8 +749,8 @@ package body Iir_Values is case Val.Kind is when Iir_Value_E32 => return Ghdl_E32'Pos (Val.E32); - when Iir_Value_B2 => - return Ghdl_B2'Pos (Val.B2); + when Iir_Value_B1 => + return Ghdl_B1'Pos (Val.B1); when others => raise Internal_Error; end case; @@ -773,8 +773,8 @@ package body Iir_Values is end if; case Value.Kind is - when Iir_Value_B2 => - Put_Line ("b2:" & Ghdl_B2'Image (Value.B2)); + when Iir_Value_B1 => + Put_Line ("b1:" & Ghdl_B1'Image (Value.B1)); when Iir_Value_E32 => Put_Line ("e32:" & Ghdl_E32'Image (Value.E32)); when Iir_Value_I64 => @@ -1016,7 +1016,7 @@ package body Iir_Values is when Iir_Value_F64 => Put (Ghdl_F64'Image (Value.F64)); when Iir_Value_E32 - | Iir_Value_B2 => + | Iir_Value_B1 => declare Bt : constant Iir := Get_Base_Type (A_Type); Id : Name_Id; @@ -1025,7 +1025,7 @@ package body Iir_Values is if Value.Kind = Iir_Value_E32 then Pos := Ghdl_E32'Pos (Value.E32); else - Pos := Ghdl_B2'Pos (Value.B2); + Pos := Ghdl_B1'Pos (Value.B1); end if; Id := Get_Identifier (Get_Nth_Element (Get_Enumeration_Literal_List (Bt), Pos)); diff --git a/simulate/iir_values.ads b/simulate/iir_values.ads index 54f9dfb4d..699ab883a 100644 --- a/simulate/iir_values.ads +++ b/simulate/iir_values.ads @@ -102,7 +102,7 @@ package Iir_Values is -- not done within the context of a process). type Iir_Value_Kind is - (Iir_Value_B2, Iir_Value_E32, + (Iir_Value_B1, Iir_Value_E32, Iir_Value_I64, Iir_Value_F64, Iir_Value_Access, Iir_Value_File, @@ -120,7 +120,7 @@ package Iir_Values is -- Scalar values. Only these ones can be signals. subtype Iir_Value_Scalars is - Iir_Value_Kind range Iir_Value_B2 .. Iir_Value_F64; + Iir_Value_Kind range Iir_Value_B1 .. Iir_Value_F64; type Iir_Value_Literal (Kind: Iir_Value_Kind); @@ -147,8 +147,8 @@ package Iir_Values is type Iir_Value_Literal (Kind: Iir_Value_Kind) is record case Kind is - when Iir_Value_B2 => - B2 : Ghdl_B2; + when Iir_Value_B1 => + B1 : Ghdl_B1; when Iir_Value_E32 => E32 : Ghdl_E32; when Iir_Value_I64 => @@ -202,7 +202,7 @@ package Iir_Values is function Create_Quantity_Value (Quantity : Quantity_Index_Type) return Iir_Value_Literal_Acc; - function Create_B2_Value (Val : Ghdl_B2) return Iir_Value_Literal_Acc; + function Create_B1_Value (Val : Ghdl_B1) return Iir_Value_Literal_Acc; function Create_E32_Value (Val : Ghdl_E32) return Iir_Value_Literal_Acc; @@ -327,11 +327,11 @@ package Iir_Values is -- boolean value for vhdl. type Lit_Enum_Type is array (Boolean) of Iir_Value_Literal_Acc; Lit_Enum_0 : constant Iir_Value_Literal_Acc := - new Iir_Value_Literal'(Kind => Iir_Value_B2, - B2 => False); + new Iir_Value_Literal'(Kind => Iir_Value_B1, + B1 => False); Lit_Enum_1 : constant Iir_Value_Literal_Acc := - new Iir_Value_Literal'(Kind => Iir_Value_B2, - B2 => True); + new Iir_Value_Literal'(Kind => Iir_Value_B1, + B1 => True); Boolean_To_Lit: constant Lit_Enum_Type := (False => Lit_Enum_0, True => Lit_Enum_1); Lit_Boolean_False: Iir_Value_Literal_Acc diff --git a/simulate/simulation.adb b/simulate/simulation.adb index 350192ab3..d951324fc 100644 --- a/simulate/simulation.adb +++ b/simulate/simulation.adb @@ -38,8 +38,8 @@ package body Simulation is return Iir_Value_Literal_Acc is begin case Mode is - when Mode_B2 => - return Create_B2_Value (Val.B2); + when Mode_B1 => + return Create_B1_Value (Val.B1); when Mode_E32 => return Create_E32_Value (Val.E32); when Mode_I64 => @@ -55,8 +55,8 @@ package body Simulation is Dst : out Value_Union) is begin case Src.Kind is - when Iir_Value_B2 => - Dst.B2 := Src.B2; + when Iir_Value_B1 => + Dst.B1 := Src.B1; when Iir_Value_E32 => Dst.E32 := Src.E32; when Iir_Value_I64 => @@ -181,9 +181,9 @@ package body Simulation is return Create_E32_Value (Grt.Signals.Ghdl_Signal_Driving_Value_E32 (Sig.Sig)); - when Mode_B2 => - return Create_B2_Value - (Grt.Signals.Ghdl_Signal_Driving_Value_B2 + when Mode_B1 => + return Create_B1_Value + (Grt.Signals.Ghdl_Signal_Driving_Value_B1 (Sig.Sig)); when others => raise Internal_Error; @@ -403,9 +403,9 @@ package body Simulation is -- FIXME: null transaction, check constraints. case Iir_Value_Scalars (El.Value.Kind) is - when Iir_Value_B2 => - Ghdl_Signal_Start_Assign_B2 - (Target.Sig, Transactions.Reject, El.Value.B2, El.After); + when Iir_Value_B1 => + Ghdl_Signal_Start_Assign_B1 + (Target.Sig, Transactions.Reject, El.Value.B1, El.After); when Iir_Value_E32 => Ghdl_Signal_Start_Assign_E32 (Target.Sig, Transactions.Reject, El.Value.E32, El.After); @@ -423,9 +423,9 @@ package body Simulation is El : Transaction_El_Type renames Transactions.Els (I); begin case Iir_Value_Scalars (El.Value.Kind) is - when Iir_Value_B2 => - Ghdl_Signal_Next_Assign_B2 - (Target.Sig, El.Value.B2, El.After); + when Iir_Value_B1 => + Ghdl_Signal_Next_Assign_B1 + (Target.Sig, El.Value.B1, El.After); when Iir_Value_E32 => Ghdl_Signal_Next_Assign_E32 (Target.Sig, El.Value.E32, El.After); @@ -796,7 +796,7 @@ package body Simulation is Instance_Pool := null; end Conversion_Proc; - function Guard_Func (Data : System.Address) return Ghdl_B2 + function Guard_Func (Data : System.Address) return Ghdl_B1 is Guard : Guard_Instance_Type; pragma Import (Ada, Guard); @@ -818,7 +818,7 @@ package body Simulation is Instance_Pool := Prev_Instance_Pool; - return Ghdl_B2'Val (Boolean'Pos (Val)); + return Ghdl_B1'Val (Boolean'Pos (Val)); end Guard_Func; -- Add a driver for signal designed by VAL (via index field) for instance @@ -1121,11 +1121,11 @@ package body Simulation is raise Internal_Error; end if; Grt.Signals.Ghdl_Signal_Associate_I64 (Port.Sig, Sig.I64); - when Iir_Value_B2 => + when Iir_Value_B1 => if Mode = Connect_Source then raise Internal_Error; end if; - Grt.Signals.Ghdl_Signal_Associate_B2 (Port.Sig, Sig.B2); + Grt.Signals.Ghdl_Signal_Associate_B1 (Port.Sig, Sig.B1); when others => raise Internal_Error; end case; @@ -1187,9 +1187,9 @@ package body Simulation is return Create_Signal_Value (Grt.Signals.Ghdl_Create_Signal_I64 (0, null, System.Null_Address)); - when Mode_B2 => + when Mode_B1 => return Create_Signal_Value - (Grt.Signals.Ghdl_Create_Signal_B2 + (Grt.Signals.Ghdl_Create_Signal_B1 (False, null, System.Null_Address)); when Mode_E32 => return Create_Signal_Value @@ -1504,9 +1504,9 @@ package body Simulation is when Iir_Value_I64 => Sig.Sig := Grt.Signals.Ghdl_Create_Signal_I64 (Lit.I64, null, System.Null_Address); - when Iir_Value_B2 => - Sig.Sig := Grt.Signals.Ghdl_Create_Signal_B2 - (Lit.B2, null, System.Null_Address); + when Iir_Value_B1 => + Sig.Sig := Grt.Signals.Ghdl_Create_Signal_B1 + (Lit.B1, null, System.Null_Address); when Iir_Value_E32 => Sig.Sig := Grt.Signals.Ghdl_Create_Signal_E32 (Lit.E32, null, System.Null_Address); diff --git a/simulate/simulation.ads b/simulate/simulation.ads index 2ed5b9acf..b910b4306 100644 --- a/simulate/simulation.ads +++ b/simulate/simulation.ads @@ -54,7 +54,7 @@ package Simulation is type Guard_Instance_Acc is access Guard_Instance_Type; - function Guard_Func (Data : System.Address) return Ghdl_B2; + function Guard_Func (Data : System.Address) return Ghdl_B1; pragma Convention (C, Guard_Func); -- The entry point of the simulator. |