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authorumarcor <unai.martinezcorral@ehu.eus>2021-06-22 12:26:43 +0200
committerumarcor <unai.martinezcorral@ehu.eus>2021-06-22 18:51:02 +0200
commit51e9764f04da876993a80f6f09910e019eb84446 (patch)
treee58928ecfbafb74bf33e8873423e7ed5874422c2 /libraries
parent25a3580831170f8a0acd0a79aca2c94ea4652338 (diff)
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fix issues reported by Codacy
Diffstat (limited to 'libraries')
-rwxr-xr-xlibraries/openieee/build_1164.py65
-rwxr-xr-xlibraries/openieee/build_numeric.py23
2 files changed, 43 insertions, 45 deletions
diff --git a/libraries/openieee/build_1164.py b/libraries/openieee/build_1164.py
index 40a7ba7e2..bab095285 100755
--- a/libraries/openieee/build_1164.py
+++ b/libraries/openieee/build_1164.py
@@ -36,7 +36,7 @@ ux01_map = { 'U': 'U',
'1': '1', 'H': '1' }
def sl_and(a,b):
- """and definition"""
+ """'and' definition."""
na = ux01_map[a]
nb = ux01_map[b]
if na == '0' or nb == '0':
@@ -48,7 +48,7 @@ def sl_and(a,b):
return '1'
def sl_not(a):
- """not definition"""
+ """'not' definition."""
na = ux01_map[a]
if na == 'U':
return 'U'
@@ -60,11 +60,11 @@ def sl_not(a):
return '1'
def sl_or(a,b):
- "or definition"
+ """'or' definition."""
return sl_not(sl_and (sl_not(a), sl_not(b)))
def sl_xor(a,b):
- "xor definition"
+ """'xor' definition."""
return sl_or(sl_and(a, sl_not(b)),
sl_and(sl_not(a), b))
@@ -72,11 +72,11 @@ def sl_xor(a,b):
out=sys.stdout
def w(s):
- "Write S to the output"
+ """Write S to the output."""
out.write(s)
def gen_log_table2(name, func):
- "Generate a logic table for binary operator NAME using its model FUNC"
+ """Generate a logic table for binary operator NAME using its model FUNC."""
w("""
constant {0}_table : table_2d :=
-- UX01ZWLH-
@@ -95,7 +95,7 @@ def gen_log_table2(name, func):
w(');\n')
def gen_log_table1(name, func):
- "Generate a logic table for unary operator NAME using its model FUNC"
+ """Generate a logic table for unary operator NAME using its model FUNC."""
w("""
constant {0}_table : table_1d :=
-- UX01ZWLH-
@@ -106,7 +106,7 @@ def gen_log_table1(name, func):
w('";\n')
def disp_tables(version):
- "Generate logic tables"
+ """Generate logic tables."""
gen_log_table2("and", sl_and)
gen_log_table2("nand", lambda a,b : sl_not(sl_and(a, b)))
gen_log_table2("or", sl_or)
@@ -119,7 +119,7 @@ def disp_tables(version):
vec_types = ['ulogic', 'logic']
def disp_scalar_binary(fun):
- "Generate scalar binary function body"
+ """Generate scalar binary function body."""
w("""
function "{0}" (l : std_ulogic; r : std_ulogic) return UX01 is
begin
@@ -127,7 +127,7 @@ def disp_scalar_binary(fun):
end "{0}";\n""".format(fun))
def disp_scalar_unary(fun):
- "Generate scalar unary function body"
+ """Generate scalar unary function body."""
w("""
function "{0}" (l : std_ulogic) return UX01 is
begin
@@ -135,7 +135,7 @@ def disp_scalar_unary(fun):
end "{0}";\n""".format(fun))
def disp_vec_binary(func, typ):
- "Generate vector binary function body"
+ """Generate vector binary function body."""
w("""
function "{0}" (l, r : std_{1}_vector) return std_{1}_vector
is
@@ -157,7 +157,7 @@ def disp_vec_binary(func, typ):
end "{0}";\n""".format(func, typ))
def disp_vec_unary(func, typ):
- "Generate vector unary function body"
+ """Generate vector unary function body."""
w("""
function "{0}" (l : std_{1}_vector) return std_{1}_vector
is
@@ -172,7 +172,7 @@ def disp_vec_unary(func, typ):
end "{0}";\n""".format(func, typ))
def disp_scal_vec_binary(func, typ):
- "Generate scalar-vector binary function body"
+ """Generate scalar-vector binary function body."""
w("""
function "{0}" (l : std_{1}_vector; r : std_{1})
return std_{1}_vector
@@ -188,7 +188,7 @@ def disp_scal_vec_binary(func, typ):
end "{0}";\n""".format(func, typ))
def disp_vec_scal_binary(func, typ):
- "Generate vector-scalar binary function body"
+ """Generate vector-scalar binary function body."""
w("""
function "{0}" (l : std_{1}; r : std_{1}_vector)
return std_{1}_vector
@@ -204,7 +204,7 @@ def disp_vec_scal_binary(func, typ):
end "{0}";\n""".format(func, typ))
def disp_vec_reduction(func, typ):
- "Generate reduction function body"
+ """Generate reduction function body."""
init = '1' if func in ['and', 'nand'] else '0'
w("""
function "{0}" (l : std_{1}_vector) return std_{1}
@@ -225,7 +225,7 @@ def gen_shift(is_left, plus, minus):
w(" " + s.format(plus, minus))
def disp_shift_funcs(func, typ):
- "Generate shift functions"
+ """Generate shift functions."""
w("""
function "{0}" (l : std_{1}_vector; r : integer)
return std_{1}_vector
@@ -255,7 +255,7 @@ def gen_rot(is_left, plus, minus):
w('\n')
def disp_rot_funcs(func, typ):
- "Generate rotation functions"
+ """Generate rotation functions."""
w("""
function "{0}" (l : std_{1}_vector; r : integer)
return std_{1}_vector
@@ -271,10 +271,10 @@ def disp_rot_funcs(func, typ):
gen_rot(func != "rol", '-', '+')
w(""" end if;
return res;
- end "{0}";\n""".format(func, typ))
+ end "{0}";\n""".format(func))
def disp_all_log_funcs(version):
- "Generate all function bodies for logic operators"
+ """Generate all function bodies for logic operators."""
for f in binary_funcs:
disp_scalar_binary(f)
disp_scalar_unary("not")
@@ -294,7 +294,7 @@ def disp_all_log_funcs(version):
disp_rot_funcs("ror", v)
def disp_sv_to_bv_conv(typ):
- "Generate logic vector to bit vector function body"
+ """Generate logic vector to bit vector function body."""
w("""
function to_bitvector (s : std_{0}_vector; xmap : bit := '0')
return bit_vector
@@ -320,7 +320,7 @@ def disp_sv_to_bv_conv(typ):
end to_bitvector;\n""".format(typ))
def disp_bv_to_sv_conv(typ):
- "Generate bit vector to logic vector function body"
+ """Generate bit vector to logic vector function body."""
w("""
function to_std{0}vector (b : bit_vector) return std_{0}_vector is
subtype res_range is natural range b'length - 1 downto 0;
@@ -334,7 +334,7 @@ def disp_bv_to_sv_conv(typ):
end to_std{0}vector;\n""".format(typ))
def disp_sv_to_sv_conv(s,d):
- "Generate logic vector to logic vector function body"
+ """Generate logic vector to logic vector function body."""
w("""
function to_std{1}vector (s : std_{0}_vector) return std_{1}_vector
is
@@ -344,7 +344,7 @@ def disp_sv_to_sv_conv(s,d):
end to_std{1}vector;\n""".format(s,d))
def disp_all_conv_funcs(version):
- "Generate conversion function bodies"
+ """Generate conversion function bodies."""
for v in vec_types:
disp_sv_to_bv_conv(v)
for v in vec_types:
@@ -355,7 +355,7 @@ def disp_all_conv_funcs(version):
disp_sv_to_sv_conv('ulogic', 'logic')
def disp_conv_vec_vec(typ, v):
- "Generate function body for vector conversion"
+ """Generate function body for vector conversion."""
utyp = typ.upper();
w("""
function to_{1} (s : std_{2}_vector) return std_{2}_vector
@@ -371,7 +371,7 @@ def disp_conv_vec_vec(typ, v):
end to_{1};\n""".format(typ, utyp, v))
def disp_conv_std(typ):
- "Generate function body for scalar conversion"
+ """Generate function body for scalar conversion."""
utyp = typ.upper();
w("""
function to_{1} (s : std_ulogic) return {1} is
@@ -380,7 +380,7 @@ def disp_conv_std(typ):
end to_{1};\n""".format(typ, utyp))
def disp_conv_bv_vec(typ, v):
- "Generate function body for bit vector conversion"
+ """Generate function body for bit vector conversion."""
utyp = typ.upper();
w("""
function to_{0} (b : bit_vector) return std_{1}_vector
@@ -396,16 +396,15 @@ def disp_conv_bv_vec(typ, v):
end to_{0};\n""".format(utyp, v))
def disp_conv_b_t(typ):
- "Generate function body for bit conversion"
- utyp = typ.upper();
+ """Generate function body for bit conversion."""
w("""
- function to_{1} (b : bit) return {1} is
+ function to_{0} (b : bit) return {0} is
begin
return bit_to_x01 (b);
- end to_{1};\n""".format(typ, utyp))
+ end to_{0};\n""".format(typ.upper()))
def disp_conv_01():
- "Generate to_01 bodies"
+ """Generate to_01 bodies."""
w("""
function to_01 (s : std_{0}_vector; xmap : std_ulogic := '0')
return std_{0}_vector
@@ -463,7 +462,7 @@ def disp_cond():
end "??";\n""")
def disp_all_norm_funcs(version):
- "Generate all function bodies for conversion"
+ """Generate all function bodies for conversion."""
if version >= V08:
disp_conv_01()
for typ in [ "x01", "x01z", "ux01" ]:
@@ -477,7 +476,7 @@ def disp_all_norm_funcs(version):
disp_cond()
def disp_all_isx_funcs(version):
- "Generate all function bodies for isx functions"
+ """Generate all function bodies for isx functions."""
for v in vec_types:
w("""
function is_X (s : std_{0}_vector) return boolean is
diff --git a/libraries/openieee/build_numeric.py b/libraries/openieee/build_numeric.py
index df6c8515f..b9348d2a7 100755
--- a/libraries/openieee/build_numeric.py
+++ b/libraries/openieee/build_numeric.py
@@ -21,7 +21,6 @@
# along with GHDL; see the file COPYING.md. If not see
# <http://www.gnu.org/licenses/>.
-import re
import sys
# My python 'style' and knowledge is basic... Do not hesitate to comment.
@@ -43,7 +42,7 @@ v93=False
out=sys.stdout
def w(s):
- "Write S to the output"
+ """Write S to the output."""
out.write(s)
def logic_type():
@@ -53,7 +52,7 @@ def logic_undef():
return logic_undefs[logic]
def disp_vec_binary(func, typ):
- "Generate the body of a vector binary logic function"
+ """Generate the body of a vector binary logic function."""
res = """
function "{0}" (l, r : {1}) return {1}
is
@@ -115,7 +114,7 @@ def extract_extend_bit(name,typ):
return res.format(name)
def disp_vec_vec_binary(func, typ):
- "Generate vector binary function body"
+ """Generate vector binary function body."""
res = """
function "{0}" (l, r : {1}) return {1}
is
@@ -219,7 +218,7 @@ def create_vec_int_dict(func, left, right):
return dic
def disp_vec_int_binary(func, left, right):
- "Generate vector binary function body"
+ """Generate vector binary function body."""
dic = create_vec_int_dict(func, left, right)
res = """
function "{func}" (l : {ltype}; r : {rtype}) return {vtype}
@@ -266,7 +265,7 @@ def disp_vec_int_binary(func, left, right):
w(res.format (**dic))
def disp_vec_int_gcompare(func, left, right):
- "Generate comparison function"
+ """Generate comparison function."""
dic = create_vec_int_dict(func, left, right)
res = """
function {func} (l : {ltype}; r : {rtype}) return compare_type
@@ -320,7 +319,7 @@ def disp_vec_int_gcompare(func, left, right):
w(res.format (**dic))
def disp_vec_int_compare(func, left, right):
- "Generate comparison function"
+ """Generate comparison function."""
dic = create_vec_int_dict(func, left, right)
res = """
function "{func}" (l : {ltype}; r : {rtype}) return boolean
@@ -366,7 +365,7 @@ def disp_vec_int_compare(func, left, right):
w(res.format (**dic))
def disp_vec_vec_gcompare(func, typ):
- "Generate comparison function"
+ """Generate comparison function."""
res = """
function {func} (l, r : {typ}) return compare_type
is
@@ -418,7 +417,7 @@ def disp_vec_vec_gcompare(func, typ):
w(res.format (func=func, typ=typ, logic=logic_type()))
def disp_vec_vec_compare(func, typ):
- "Generate comparison function"
+ """Generate comparison function."""
res = """
function "{func}" (l, r : {typ}) return boolean
is
@@ -451,7 +450,7 @@ def disp_vec_vec_compare(func, typ):
w(res.format (func=func, typ=typ))
def disp_vec_not(typ):
- "Generate vector binary function body"
+ """Generate vector binary function body."""
w("""
function "not" (l : {0}) return {0}
is
@@ -1010,7 +1009,7 @@ def disp_vec_int_sdiv(func):
w(res.format(func=func))
def disp_all_log_funcs():
- "Generate all function bodies for logic operators"
+ """Generate all function bodies for logic operators."""
for t in vec_types:
disp_resize(t)
for v in vec_types:
@@ -1076,7 +1075,7 @@ def disp_all_match_funcs():
disp_match('SIGNED');
def disp_all_arith_funcs():
- "Generate all function bodies for logic operators"
+ """Generate all function bodies for logic operators."""
for op in ['+', '-']:
disp_vec_vec_binary(op, "UNSIGNED")
disp_vec_vec_binary(op, "SIGNED")