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author1138-4EB <1138-4EB@users.noreply.github.com>2017-03-02 00:24:57 +0100
committertgingold <tgingold@users.noreply.github.com>2017-12-10 12:02:05 +0100
commit28d9ddf0e2aff8fe6937949f54285cae9ee478a7 (patch)
tree0b91e072680c96493037360f7c05f1568912a99c /doc
parent13a5256846f946d646a21faf221001f9ba15044d (diff)
downloadghdl-28d9ddf0e2aff8fe6937949f54285cae9ee478a7.tar.gz
ghdl-28d9ddf0e2aff8fe6937949f54285cae9ee478a7.tar.bz2
ghdl-28d9ddf0e2aff8fe6937949f54285cae9ee478a7.zip
Add raw sources of tutorial 'How to simulate an UART VHDL code with ghdl}' by 'René Doß'
Diffstat (limited to 'doc')
-rw-r--r--doc/using/QuickStartGuide.rst29
-rw-r--r--doc/using/UART_srcs/UART.docxbin0 -> 73021 bytes
-rw-r--r--doc/using/UART_srcs/UART_timing.jpgbin0 -> 61424 bytes
-rw-r--r--doc/using/UART_srcs/UART_timing.pngbin0 -> 14715 bytes
-rw-r--r--doc/using/UART_srcs/UART_timing.svg281
-rw-r--r--doc/using/UART_srcs/capitalisation/Zeichnung.svg225
-rw-r--r--doc/using/UART_srcs/capitalisation/capitalisation.pngbin0 -> 48212 bytes
-rw-r--r--doc/using/UART_srcs/capitalisation/capitalisation.vhd51
-rw-r--r--doc/using/UART_srcs/capitalisation/makefile18
-rw-r--r--doc/using/UART_srcs/capitalisation/tb_capitalisation.vhd89
-rw-r--r--doc/using/UART_srcs/capitalisation/top_capitalisation.vhd126
-rw-r--r--doc/using/UART_srcs/capitalisation/zeichnung.pngbin0 -> 15065 bytes
-rw-r--r--doc/using/UART_srcs/file_in_out/Zeichnung.svg290
-rw-r--r--doc/using/UART_srcs/file_in_out/makefile13
-rw-r--r--doc/using/UART_srcs/file_in_out/tb_file.vhd142
-rw-r--r--doc/using/UART_srcs/file_in_out/test.txt1
-rw-r--r--doc/using/UART_srcs/file_in_out/test1.txt1
-rw-r--r--doc/using/UART_srcs/file_in_out/zeichnung.pngbin0 -> 11280 bytes
-rw-r--r--doc/using/UART_srcs/rx/UART_RX_8N1.vhd150
-rw-r--r--doc/using/UART_srcs/rx/makefile8
-rw-r--r--doc/using/UART_srcs/rx/sim_RX.pngbin0 -> 44756 bytes
-rw-r--r--doc/using/UART_srcs/rx/tb_UART_RX_8N1.vhd121
-rw-r--r--doc/using/UART_srcs/tx/BlockTX.pngbin0 -> 21655 bytes
-rw-r--r--doc/using/UART_srcs/tx/TX.ghwbin0 -> 349969 bytes
-rw-r--r--doc/using/UART_srcs/tx/TX.svg395
-rw-r--r--doc/using/UART_srcs/tx/TX_simple.pngbin0 -> 63700 bytes
-rw-r--r--doc/using/UART_srcs/tx/UART_TX_8N1.vhd162
-rw-r--r--doc/using/UART_srcs/tx/makefile8
-rw-r--r--doc/using/UART_srcs/tx/path6054.pngbin0 -> 74166 bytes
-rw-r--r--doc/using/UART_srcs/tx/tb_UART_TX_8N1.vhd95
-rw-r--r--doc/using/UART_srcs/tx/tx.gtkw33
-rw-r--r--doc/using/UART_srcs/uart.aux48
-rw-r--r--doc/using/UART_srcs/uart.fdb_latexmk87
-rw-r--r--doc/using/UART_srcs/uart.fls139
-rw-r--r--doc/using/UART_srcs/uart.out8
-rw-r--r--doc/using/UART_srcs/uart.tex269
-rw-r--r--doc/using/UART_srcs/uart.toc8
-rw-r--r--doc/using/UART_srcs/vhpi/Zeichnung.svg424
-rw-r--r--doc/using/UART_srcs/vhpi/makefile22
-rw-r--r--doc/using/UART_srcs/vhpi/tb_tty.vhd116
-rw-r--r--doc/using/UART_srcs/vhpi/terminal.pngbin0 -> 18429 bytes
-rw-r--r--doc/using/UART_srcs/vhpi/tty.c83
-rw-r--r--doc/using/UART_srcs/vhpi/tty_pkg.vhd70
-rw-r--r--doc/using/UART_srcs/vhpi/zeichnung.pngbin0 -> 45158 bytes
44 files changed, 3510 insertions, 2 deletions
diff --git a/doc/using/QuickStartGuide.rst b/doc/using/QuickStartGuide.rst
index baf6c6a52..4cbbe8027 100644
--- a/doc/using/QuickStartGuide.rst
+++ b/doc/using/QuickStartGuide.rst
@@ -52,7 +52,31 @@ To illustrate the large purpose of `VHDL`, here is a commented `'Hello world'` p
* As a result, :option:`-r` is just a passthrough to the binary generated in the `elaboration`. Therefore, the executable can be run directly, :samp:`./hello_world`. See :option:`-r` for more informartion.
.. HINT:: :option:`-e` can be bypassed with mcode, since :option:`-r` actually elaborates the design and saves it on memory before running the simulation. But you can still use it to check for some elaboration problems.
-
+
+The `heartbeat` program
+=======================
+
+.. code-block:: VHDL
+
+ entity hello_world is
+ port ( clk: out std_logic; )
+ end hearbeat;
+
+ architecture behaviour of hello_world is
+ begin
+ -- Clock process definition
+ clk_process: process
+ begin
+ clk <= '0';
+ wait for clk_period/2;
+ clk <= '1';
+ wait for clk_period/2;
+ end process;
+ end behaviour;
+
+.. TODO:: Complete `heartbeat` example program
+
+
A full adder
============
@@ -204,4 +228,5 @@ Further examples
.. TODO::
* Add references to examples/tutorials with GHDL.
- * Shall `René Doß <https://mail.gna.org/public/ghdl-discuss/2017-01/msg00000.html>` want to contribute adapting his article to RST? \ No newline at end of file
+ * Shall `René Doß <https://mail.gna.org/public/ghdl-discuss/2017-01/msg00000.html>` want to contribute adapting his article to RST?
+ * https://github.com/Obijuan/open-fpga-verilog-tutorial/wiki \ No newline at end of file
diff --git a/doc/using/UART_srcs/UART.docx b/doc/using/UART_srcs/UART.docx
new file mode 100644
index 000000000..201af4057
--- /dev/null
+++ b/doc/using/UART_srcs/UART.docx
Binary files differ
diff --git a/doc/using/UART_srcs/UART_timing.jpg b/doc/using/UART_srcs/UART_timing.jpg
new file mode 100644
index 000000000..d221aef43
--- /dev/null
+++ b/doc/using/UART_srcs/UART_timing.jpg
Binary files differ
diff --git a/doc/using/UART_srcs/UART_timing.png b/doc/using/UART_srcs/UART_timing.png
new file mode 100644
index 000000000..b00adb3b4
--- /dev/null
+++ b/doc/using/UART_srcs/UART_timing.png
Binary files differ
diff --git a/doc/using/UART_srcs/UART_timing.svg b/doc/using/UART_srcs/UART_timing.svg
new file mode 100644
index 000000000..77bb409d5
--- /dev/null
+++ b/doc/using/UART_srcs/UART_timing.svg
@@ -0,0 +1,281 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!-- Created with Inkscape (http://www.inkscape.org/) -->
+
+<svg
+ xmlns:dc="http://purl.org/dc/elements/1.1/"
+ xmlns:cc="http://creativecommons.org/ns#"
+ xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
+ xmlns:svg="http://www.w3.org/2000/svg"
+ xmlns="http://www.w3.org/2000/svg"
+ xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
+ xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
+ id="svg4206"
+ version="1.1"
+ inkscape:version="0.91 r13725"
+ width="588"
+ height="277"
+ viewBox="0 0 588 277"
+ sodipodi:docname="UART_timing.svg">
+ <metadata
+ id="metadata4212">
+ <rdf:RDF>
+ <cc:Work
+ rdf:about="">
+ <dc:format>image/svg+xml</dc:format>
+ <dc:type
+ rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
+ <dc:title></dc:title>
+ </cc:Work>
+ </rdf:RDF>
+ </metadata>
+ <defs
+ id="defs4210" />
+ <sodipodi:namedview
+ pagecolor="#ffffff"
+ bordercolor="#666666"
+ borderopacity="1"
+ objecttolerance="10"
+ gridtolerance="10"
+ guidetolerance="10"
+ inkscape:pageopacity="0"
+ inkscape:pageshadow="2"
+ inkscape:window-width="1920"
+ inkscape:window-height="1016"
+ id="namedview4208"
+ showgrid="false"
+ inkscape:zoom="1.6102313"
+ inkscape:cx="356.97138"
+ inkscape:cy="122.39625"
+ inkscape:window-x="0"
+ inkscape:window-y="27"
+ inkscape:window-maximized="1"
+ inkscape:current-layer="svg4206">
+ <inkscape:grid
+ type="xygrid"
+ id="grid4272" />
+ </sodipodi:namedview>
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="m 68.313169,180.74053 c 60.239791,0 60.239791,1.24206 60.239791,1.24206 l 0,42.85099 35.39865,0 0,-43.47202 99.3646,0 0,43.47202 100.60667,0 0,-44.09305 34.15659,0 0,42.85099 32.29349,0 0,-43.47201 58.37671,0"
+ id="path4216"
+ inkscape:connector-curvature="0" />
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="m 499.92819,180.74053 18.00984,0 0,43.47202 27.94629,0"
+ id="path4218"
+ inkscape:connector-curvature="0" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:40px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-163.42825"
+ y="155.71837"
+ id="text4220"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-1,1,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4222"
+ x="-163.42825"
+ y="155.71837"
+ style="font-size:25px">Start Bit</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:40px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-156.69612"
+ y="187.65898"
+ id="text4224"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-1,1,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4226"
+ x="-156.69612"
+ y="187.65898"
+ style="font-size:25px">LSB 0</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:40px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-155.82106"
+ y="220.35068"
+ id="text4228"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-1,1,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4230"
+ x="-155.82106"
+ y="220.35068"
+ style="font-size:25px">Bit 1</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-156.35822"
+ y="253.69583"
+ id="text4232"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-1,1,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4234"
+ x="-156.35822"
+ y="253.69583">Bit 2</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-155.67163"
+ y="287.68027"
+ id="text4236"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-1,1,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4238"
+ x="-155.67163"
+ y="287.68027">Bit 3</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-155.76352"
+ y="321.67154"
+ id="text4240"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-1,1,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4242"
+ x="-155.76352"
+ y="321.67154">Bit 4</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-156.06438"
+ y="356.12897"
+ id="text4244"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-1,1,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4246"
+ x="-156.06438"
+ y="356.12897">Bit 5</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-155.62802"
+ y="387.69766"
+ id="text4248"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-1,1,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4250"
+ x="-155.62802"
+ y="387.69766">Bit 6</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-156.52492"
+ y="422.76407"
+ id="text4252"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-1,1,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4254"
+ x="-156.52492"
+ y="422.76407">MSB 7</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-163.18716"
+ y="458.05252"
+ id="text4256"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-1,1,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4258"
+ x="-163.18716"
+ y="458.05252">Stop Bit</tspan></text>
+ <text
+ transform="matrix(0,-1,1,0,0,0)"
+ sodipodi:linespacing="125%"
+ id="text4260"
+ y="542.61932"
+ x="-162.80724"
+ style="font-style:normal;font-weight:normal;font-size:40px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"><tspan
+ style="font-size:25px"
+ y="542.61932"
+ x="-162.80724"
+ id="tspan4262"
+ sodipodi:role="line">Start Bit</tspan></text>
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;stroke-miterlimit:4;stroke-dasharray:none"
+ d="m 486.29976,173.61561 c 0,0 8.40614,3.7777 3.27846,6.76988 -3.238,1.88949 -5.24995,3.20135 -1.24209,6.7625 l 3.64629,3.23987 0,0"
+ id="path4270"
+ inkscape:connector-curvature="0"
+ sodipodi:nodetypes="csscc" />
+ <path
+ sodipodi:nodetypes="csscc"
+ inkscape:connector-curvature="0"
+ id="path4274"
+ d="m 496.83897,173.17648 c 0,0 8.40614,3.7777 3.27846,6.76988 -3.238,1.88949 -5.24995,3.20135 -1.24209,6.7625 l 3.64629,3.23987 0,0"
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1" />
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;stroke-miterlimit:4;stroke-dasharray:3,3;stroke-dashoffset:0"
+ d="m 197.48716,181.36156 0,42.85099"
+ id="path4278"
+ inkscape:connector-curvature="0" />
+ <path
+ inkscape:connector-curvature="0"
+ id="path4280"
+ d="m 230.64175,181.36156 0,42.85099"
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:3, 3;stroke-dashoffset:0;stroke-opacity:1" />
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:3, 3;stroke-dashoffset:0;stroke-opacity:1"
+ d="m 297.39007,181.36156 0,42.85099"
+ id="path4282"
+ inkscape:connector-curvature="0" />
+ <path
+ inkscape:connector-curvature="0"
+ id="path4284"
+ d="m 331.08088,181.36156 0,42.85099"
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:3, 3;stroke-dashoffset:0;stroke-opacity:1" />
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:3, 3;stroke-dashoffset:0;stroke-opacity:1"
+ d="m 464.13839,181.36156 0,42.85099"
+ id="path4286"
+ inkscape:connector-curvature="0" />
+ <path
+ inkscape:connector-curvature="0"
+ id="path4288"
+ d="m 548.45206,181.36156 0,42.85099"
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:3, 3;stroke-dashoffset:0;stroke-opacity:1" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-154.24739"
+ y="106.97655"
+ id="text4290"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-1,1,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4292"
+ x="-154.24739"
+ y="106.97655">silence</tspan></text>
+ <text
+ transform="matrix(0,-1,1,0,0,0)"
+ sodipodi:linespacing="125%"
+ id="text4294"
+ y="106.97655"
+ x="-154.24739"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"><tspan
+ y="106.97655"
+ x="-154.24739"
+ id="tspan4296"
+ sodipodi:role="line">silence</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-160.8344"
+ y="499.56207"
+ id="text4298"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-1,1,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4300"
+ x="-160.8344"
+ y="499.56207">silence</tspan></text>
+</svg>
diff --git a/doc/using/UART_srcs/capitalisation/Zeichnung.svg b/doc/using/UART_srcs/capitalisation/Zeichnung.svg
new file mode 100644
index 000000000..e64d02ab5
--- /dev/null
+++ b/doc/using/UART_srcs/capitalisation/Zeichnung.svg
@@ -0,0 +1,225 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!-- Created with Inkscape (http://www.inkscape.org/) -->
+
+<svg
+ xmlns:dc="http://purl.org/dc/elements/1.1/"
+ xmlns:cc="http://creativecommons.org/ns#"
+ xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
+ xmlns:svg="http://www.w3.org/2000/svg"
+ xmlns="http://www.w3.org/2000/svg"
+ xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
+ xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
+ width="297mm"
+ height="210mm"
+ viewBox="0 0 1052.3622 744.09448"
+ id="svg2"
+ version="1.1"
+ inkscape:version="0.91 r13725"
+ sodipodi:docname="Zeichnung.svg">
+ <defs
+ id="defs4">
+ <marker
+ inkscape:isstock="true"
+ style="overflow:visible;"
+ id="marker4462"
+ refX="0.0"
+ refY="0.0"
+ orient="auto"
+ inkscape:stockid="Arrow1Lend">
+ <path
+ transform="scale(0.8) rotate(180) translate(12.5,0)"
+ style="fill-rule:evenodd;stroke:#000000;stroke-width:1pt;stroke-opacity:1;fill:#000000;fill-opacity:1"
+ d="M 0.0,0.0 L 5.0,-5.0 L -12.5,0.0 L 5.0,5.0 L 0.0,0.0 z "
+ id="path4464" />
+ </marker>
+ <marker
+ inkscape:stockid="Arrow1Lend"
+ orient="auto"
+ refY="0.0"
+ refX="0.0"
+ id="Arrow1Lend"
+ style="overflow:visible;"
+ inkscape:isstock="true"
+ inkscape:collect="always">
+ <path
+ id="path4183"
+ d="M 0.0,0.0 L 5.0,-5.0 L -12.5,0.0 L 5.0,5.0 L 0.0,0.0 z "
+ style="fill-rule:evenodd;stroke:#000000;stroke-width:1pt;stroke-opacity:1;fill:#000000;fill-opacity:1"
+ transform="scale(0.8) rotate(180) translate(12.5,0)" />
+ </marker>
+ </defs>
+ <sodipodi:namedview
+ id="base"
+ pagecolor="#ffffff"
+ bordercolor="#666666"
+ borderopacity="1.0"
+ inkscape:pageopacity="0.0"
+ inkscape:pageshadow="2"
+ inkscape:zoom="1.4"
+ inkscape:cx="493.91425"
+ inkscape:cy="469.59264"
+ inkscape:document-units="px"
+ inkscape:current-layer="layer1"
+ showgrid="false"
+ inkscape:window-width="1920"
+ inkscape:window-height="1016"
+ inkscape:window-x="0"
+ inkscape:window-y="27"
+ inkscape:window-maximized="1" />
+ <metadata
+ id="metadata7">
+ <rdf:RDF>
+ <cc:Work
+ rdf:about="">
+ <dc:format>image/svg+xml</dc:format>
+ <dc:type
+ rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
+ <dc:title></dc:title>
+ </cc:Work>
+ </rdf:RDF>
+ </metadata>
+ <g
+ inkscape:label="Ebene 1"
+ inkscape:groupmode="layer"
+ id="layer1"
+ transform="translate(0,-308.26772)">
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="443.14285"
+ y="623.79077"
+ id="text4136"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4138"
+ x="443.14285"
+ y="623.79077">capitalisation</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="209.99998"
+ y="623.79077"
+ id="text4140"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4142"
+ x="209.99998"
+ y="623.79077">UART_8N1_RX</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="668.00006"
+ y="623.79077"
+ id="text4144"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4146"
+ x="668.00006"
+ y="623.79077">UART_8N1TX</tspan></text>
+ <rect
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ id="rect4148"
+ width="182.85715"
+ height="70"
+ x="202.28572"
+ y="579.50507" />
+ <rect
+ y="579.50507"
+ x="426.28574"
+ height="70"
+ width="182.85715"
+ id="rect4150"
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1" />
+ <rect
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ id="rect4152"
+ width="182.85715"
+ height="70"
+ x="650.28577"
+ y="579.50507" />
+ <rect
+ y="488.64792"
+ x="100.28571"
+ height="214.28572"
+ width="838.57147"
+ id="rect4154"
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="139.71428"
+ y="618.07648"
+ id="text4156"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4158"
+ x="139.71428"
+ y="618.07648">RX</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="849.71429"
+ y="616.93365"
+ id="text4160"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4162"
+ x="849.71429"
+ y="616.93365">TX</tspan></text>
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#marker4462)"
+ d="m 132.85714,626.64792 67.14286,0"
+ id="path4164"
+ inkscape:connector-curvature="0" />
+ <path
+ inkscape:connector-curvature="0"
+ id="path4166"
+ d="m 834.85715,626.64792 67.14285,0"
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow1Lend)" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="130"
+ y="529.50507"
+ id="text4168"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4170"
+ x="130"
+ y="529.50507">top_capitalisation</tspan></text>
+ <path
+ inkscape:connector-curvature="0"
+ id="path4172"
+ d="m 385.57141,626.64789 40.35714,0"
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1" />
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="m 609.57141,626.64789 40.35714,0"
+ id="path4174"
+ inkscape:connector-curvature="0" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:17.1706295px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-712.43713"
+ y="357.6622"
+ id="text4490"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-0.86921859,1.1504586,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4492"
+ x="-712.43713"
+ y="357.6622">8bit parallel</tspan></text>
+ <text
+ transform="matrix(0,-0.86921859,1.1504586,0,0,0)"
+ sodipodi:linespacing="125%"
+ id="text4494"
+ y="553.23639"
+ x="-709.15009"
+ style="font-style:normal;font-weight:normal;font-size:17.1706295px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"><tspan
+ y="553.23639"
+ x="-709.15009"
+ id="tspan4496"
+ sodipodi:role="line">8bit parallel</tspan></text>
+ </g>
+</svg>
diff --git a/doc/using/UART_srcs/capitalisation/capitalisation.png b/doc/using/UART_srcs/capitalisation/capitalisation.png
new file mode 100644
index 000000000..5b6dcbc37
--- /dev/null
+++ b/doc/using/UART_srcs/capitalisation/capitalisation.png
Binary files differ
diff --git a/doc/using/UART_srcs/capitalisation/capitalisation.vhd b/doc/using/UART_srcs/capitalisation/capitalisation.vhd
new file mode 100644
index 000000000..e904eda95
--- /dev/null
+++ b/doc/using/UART_srcs/capitalisation/capitalisation.vhd
@@ -0,0 +1,51 @@
+-- loopback engine
+----------------------------------------------------------------------
+library IEEE;
+use IEEE.STD_LOGIC_1164.all;
+use ieee.numeric_std.all;
+
+entity capitalisation is
+ port(
+ clk : in std_logic;
+ reset : in std_logic;
+ --in
+ rdata : in std_logic_vector(7 downto 0);
+ rd_en : in std_logic;
+ rd : out std_logic;
+ --out
+ wdata : out std_logic_vector(7 downto 0);
+ wr_en : in std_logic;
+ wr : out std_logic
+ );
+end;
+
+architecture Behavioral of capitalisation is
+
+
+
+begin
+
+
+ process(clk)
+ begin
+ wr<='0';
+ rd<='0';
+ if wr_en='1' and rd_en ='1' then
+ wr<='1';
+ rd<='1';
+ if (unsigned(rdata)>X"60") and
+ (unsigned(rdata)<X"7B") then
+ wdata<=rdata(7 downto 6 )&'0'& rdata(4 downto 0);
+ else
+ wdata<=rdata;
+ end if;
+ end if;
+ if reset='1' then
+ wr<='0';
+ end if;
+ end process;
+
+
+
+end Behavioral;
+
diff --git a/doc/using/UART_srcs/capitalisation/makefile b/doc/using/UART_srcs/capitalisation/makefile
new file mode 100644
index 000000000..ad8a01b04
--- /dev/null
+++ b/doc/using/UART_srcs/capitalisation/makefile
@@ -0,0 +1,18 @@
+all:
+ rm -rf work
+ mkdir work
+
+ ghdl -a --work=work --workdir=work top_capitalisation.vhd
+ ghdl -a --work=work --workdir=work capitalisation.vhd
+ ghdl -a --work=work --workdir=work ../rx/UART_RX_8N1.vhd
+ ghdl -a --work=work --workdir=work ../tx/UART_TX_8N1.vhd
+ ghdl -a --work=work --workdir=work capitalisation.vhd
+
+ ghdl -a --work=work --workdir=work tb_capitalisation.vhd
+ ghdl -e --workdir=work -Pwork tb_capitalisation
+ ghdl -r tb_capitalisation --wave=tbench.ghw --stop-time=700us
+
+
+view:
+ gtkwave tbench.ghw a.gtkw
+
diff --git a/doc/using/UART_srcs/capitalisation/tb_capitalisation.vhd b/doc/using/UART_srcs/capitalisation/tb_capitalisation.vhd
new file mode 100644
index 000000000..364142946
--- /dev/null
+++ b/doc/using/UART_srcs/capitalisation/tb_capitalisation.vhd
@@ -0,0 +1,89 @@
+-- tb_capitalisation.vhd
+----------------------------------------------------------------------
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity tb_capitalisation is
+end tb_capitalisation;
+
+architecture behavior of tb_capitalisation is
+
+ constant board_clk_period : time := 10 ns;
+ constant board_clk_freq: integer :=100E6; --100MHz
+
+ signal board_clk : std_logic := '0';
+ signal reset : std_logic := '0';
+ signal rx : std_logic := '1';
+ signal tx : std_logic;
+
+ procedure tx_char (signal txpin : out std_logic;
+ txdata : in character; baudrate : in integer) is
+ constant bittime : time := (integer(1000000000.0/real(baudrate))) * 1 ns;
+ variable c : std_logic_vector(7 downto 0);
+ begin
+ c := std_logic_vector(to_unsigned(character'pos(txdata), 8));
+ txpin <= '0'; -- Startbit
+ wait for bittime;
+ for i in 0 to 7 loop
+ txpin <= c(i);
+ wait for bittime;
+ end loop;
+ txpin <= '1'; -- Stopbit
+ wait for bittime;
+ end tx_char;
+
+ -- Component Declaration for the Unit Under Test (UUT)
+component top_capitalisation is
+ generic (clk_freq : integer;
+ baudrate : integer);
+ port(
+ board_clk : in std_logic ;
+ reset : in std_logic ;
+ rx : in std_logic ;
+ tx : out std_logic );
+end component;
+
+begin
+ -- Instantiate the Unit Under Test (UUT)
+UART_example: top_capitalisation
+ generic map (
+ clk_freq => board_clk_freq,
+ baudrate =>115200)
+ port map(
+ board_clk => board_clk,
+ reset => reset,
+ rx => rx,
+ tx => tx );
+
+ process
+ begin
+ wait for 80000 ns;
+ tx_char(RX, '$', 115200);
+ tx_char(RX, 'g', 115200);
+ tx_char(RX, '#', 115200);
+ wait for 50 us;
+ tx_char(RX, 'b', 115200);
+ tx_char(RX, 'c', 115200);
+ wait; -- will wait forever
+ end process;
+
+ -- Clock process definitions
+ board_clk_process : process
+ begin
+ board_clk <= '0';
+ wait for board_clk_period/2;
+ board_clk <= '1';
+ wait for board_clk_period/2;
+ end process;
+
+ -- Stimulus process
+ process
+ begin
+ reset <= '1';
+ wait for 100 ns;
+ reset <='0';
+ wait;
+ end process;
+
+end;
diff --git a/doc/using/UART_srcs/capitalisation/top_capitalisation.vhd b/doc/using/UART_srcs/capitalisation/top_capitalisation.vhd
new file mode 100644
index 000000000..01c8e3585
--- /dev/null
+++ b/doc/using/UART_srcs/capitalisation/top_capitalisation.vhd
@@ -0,0 +1,126 @@
+-- top_capitalisation.vhd
+----------------------------------------------------------------------
+
+-- top_capitalisation
+-- |
+-- + capitalisation
+-- + UART_8N1_RX
+-- + UART_8N1_TX
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity top_capitalisation is
+ generic (clk_freq : integer;
+ baudrate : integer);
+ port(
+ board_clk : in std_logic ;
+ reset : in std_logic ;
+ rx : in std_logic ;
+ tx : out std_logic );
+end top_capitalisation;
+
+architecture behavior of top_capitalisation is
+ signal rd_en : std_logic;
+ signal rdata : std_logic_vector (7 downto 0);
+ signal rd : std_logic;
+
+ signal wr_en : std_logic;
+ signal wdata : std_logic_vector (7 downto 0);
+ signal wr : std_logic;
+
+component capitalisation is
+ port(
+ clk : in std_logic;
+ reset : in std_logic;
+ --in
+ rdata : in std_logic_vector(7 downto 0);
+ rd_en : in std_logic;
+ rd : out std_logic;
+ --out
+ wdata : out std_logic_vector(7 downto 0);
+ wr_en : in std_logic;
+ wr : out std_logic
+ );
+end component;
+
+component UART_8N1_RX is
+ generic (clk_freq : integer;
+ baudrate : integer);
+ port(
+ clk : in std_logic;
+ reset : in std_logic;
+ --8bit interface
+ rdata : out std_logic_vector(7 downto 0);
+ rd : in std_logic;
+ rd_en : out std_logic;
+ --physical wire RX
+ rx : in std_logic
+ );
+end component;
+
+component UART_8N1_TX is
+ generic(
+ clk_freq : integer;
+ baudrate : integer;
+ addr_depth : integer:=5);
+ port(
+ clk : in std_logic;
+ reset : in std_logic;
+ --8bit interface
+ wdata : in std_logic_vector(7 downto 0);
+ wr : in std_logic;
+ wr_en : out std_logic;
+
+ --physical wire
+ tx : out std_logic);
+end component;
+
+
+begin
+
+UART_RX:UART_8N1_RX
+ generic map (
+ clk_freq => clk_freq,
+ baudrate =>115200)
+ port map(
+ clk => board_clk,
+ reset => reset,
+ rdata => rdata,
+ rd => rd,
+ rd_en => rd_en,
+ --physical wire RX
+ rx => rx
+ );
+
+trans: capitalisation
+ port map(
+ clk => board_clk,
+ reset => reset,
+ --in
+ rdata => rdata,
+ rd_en => rd_en,
+ rd => rd,
+ --out
+ wdata => wdata,
+ wr_en => wr_en,
+ wr => wr
+ );
+
+UART_TX: UART_8N1_TX
+ generic map(
+ clk_freq => clk_freq,
+ baudrate => 115200)
+ port map(
+ clk => board_clk,
+ reset => reset,
+ --8bit interface
+ wdata => wdata,
+ wr => wr,
+ wr_en => wr_en,
+
+ --physical wire TX
+ tx => tx
+ );
+end;
diff --git a/doc/using/UART_srcs/capitalisation/zeichnung.png b/doc/using/UART_srcs/capitalisation/zeichnung.png
new file mode 100644
index 000000000..f51a0fbdd
--- /dev/null
+++ b/doc/using/UART_srcs/capitalisation/zeichnung.png
Binary files differ
diff --git a/doc/using/UART_srcs/file_in_out/Zeichnung.svg b/doc/using/UART_srcs/file_in_out/Zeichnung.svg
new file mode 100644
index 000000000..ae9e85d86
--- /dev/null
+++ b/doc/using/UART_srcs/file_in_out/Zeichnung.svg
@@ -0,0 +1,290 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!-- Created with Inkscape (http://www.inkscape.org/) -->
+
+<svg
+ xmlns:dc="http://purl.org/dc/elements/1.1/"
+ xmlns:cc="http://creativecommons.org/ns#"
+ xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
+ xmlns:svg="http://www.w3.org/2000/svg"
+ xmlns="http://www.w3.org/2000/svg"
+ xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
+ xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
+ width="297mm"
+ height="210mm"
+ viewBox="0 0 1052.3622 744.09448"
+ id="svg2"
+ version="1.1"
+ inkscape:version="0.91 r13725"
+ sodipodi:docname="Zeichnung.svg"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/zeichnung.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90">
+ <defs
+ id="defs4">
+ <marker
+ inkscape:stockid="Arrow1Lend"
+ orient="auto"
+ refY="0.0"
+ refX="0.0"
+ id="marker5517"
+ style="overflow:visible;"
+ inkscape:isstock="true">
+ <path
+ id="path5519"
+ d="M 0.0,0.0 L 5.0,-5.0 L -12.5,0.0 L 5.0,5.0 L 0.0,0.0 z "
+ style="fill-rule:evenodd;stroke:#000000;stroke-width:1pt;stroke-opacity:1;fill:#000000;fill-opacity:1"
+ transform="scale(0.8) rotate(180) translate(12.5,0)" />
+ </marker>
+ <marker
+ inkscape:isstock="true"
+ style="overflow:visible;"
+ id="marker5229"
+ refX="0.0"
+ refY="0.0"
+ orient="auto"
+ inkscape:stockid="Arrow1Lend"
+ inkscape:collect="always">
+ <path
+ transform="scale(0.8) rotate(180) translate(12.5,0)"
+ style="fill-rule:evenodd;stroke:#000000;stroke-width:1pt;stroke-opacity:1;fill:#000000;fill-opacity:1"
+ d="M 0.0,0.0 L 5.0,-5.0 L -12.5,0.0 L 5.0,5.0 L 0.0,0.0 z "
+ id="path5231" />
+ </marker>
+ <marker
+ inkscape:isstock="true"
+ style="overflow:visible;"
+ id="marker4462"
+ refX="0.0"
+ refY="0.0"
+ orient="auto"
+ inkscape:stockid="Arrow1Lend"
+ inkscape:collect="always">
+ <path
+ transform="scale(0.8) rotate(180) translate(12.5,0)"
+ style="fill-rule:evenodd;stroke:#000000;stroke-width:1pt;stroke-opacity:1;fill:#000000;fill-opacity:1"
+ d="M 0.0,0.0 L 5.0,-5.0 L -12.5,0.0 L 5.0,5.0 L 0.0,0.0 z "
+ id="path4464" />
+ </marker>
+ <marker
+ inkscape:stockid="Arrow1Lend"
+ orient="auto"
+ refY="0.0"
+ refX="0.0"
+ id="Arrow1Lend"
+ style="overflow:visible;"
+ inkscape:isstock="true"
+ inkscape:collect="always">
+ <path
+ id="path4183"
+ d="M 0.0,0.0 L 5.0,-5.0 L -12.5,0.0 L 5.0,5.0 L 0.0,0.0 z "
+ style="fill-rule:evenodd;stroke:#000000;stroke-width:1pt;stroke-opacity:1;fill:#000000;fill-opacity:1"
+ transform="scale(0.8) rotate(180) translate(12.5,0)" />
+ </marker>
+ </defs>
+ <sodipodi:namedview
+ id="base"
+ pagecolor="#ffffff"
+ bordercolor="#666666"
+ borderopacity="1.0"
+ inkscape:pageopacity="0.0"
+ inkscape:pageshadow="2"
+ inkscape:zoom="0.98994949"
+ inkscape:cx="501.72415"
+ inkscape:cy="479.92169"
+ inkscape:document-units="px"
+ inkscape:current-layer="layer1"
+ showgrid="false"
+ inkscape:window-width="1920"
+ inkscape:window-height="1016"
+ inkscape:window-x="0"
+ inkscape:window-y="27"
+ inkscape:window-maximized="1" />
+ <metadata
+ id="metadata7">
+ <rdf:RDF>
+ <cc:Work
+ rdf:about="">
+ <dc:format>image/svg+xml</dc:format>
+ <dc:type
+ rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
+ <dc:title></dc:title>
+ </cc:Work>
+ </rdf:RDF>
+ </metadata>
+ <g
+ inkscape:label="Ebene 1"
+ inkscape:groupmode="layer"
+ id="layer1"
+ transform="translate(0,-308.26772)">
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="443.14285"
+ y="623.79077"
+ id="text4136"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4138"
+ x="443.14285"
+ y="623.79077">capitalisation</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="209.99998"
+ y="623.79077"
+ id="text4140"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4142"
+ x="209.99998"
+ y="623.79077">UART_8N1_RX</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="668.00006"
+ y="623.79077"
+ id="text4144"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4146"
+ x="668.00006"
+ y="623.79077">UART_8N1TX</tspan></text>
+ <rect
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ id="rect4148"
+ width="182.85715"
+ height="70"
+ x="202.28572"
+ y="579.50507" />
+ <rect
+ y="579.50507"
+ x="426.28574"
+ height="70"
+ width="182.85715"
+ id="rect4150"
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1" />
+ <rect
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ id="rect4152"
+ width="182.85715"
+ height="70"
+ x="650.28577"
+ y="579.50507" />
+ <rect
+ y="488.64792"
+ x="100.28571"
+ height="214.28572"
+ width="838.57147"
+ id="rect4154"
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="139.71428"
+ y="618.07648"
+ id="text4156"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4158"
+ x="139.71428"
+ y="618.07648">RX</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="849.71429"
+ y="616.93365"
+ id="text4160"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4162"
+ x="849.71429"
+ y="616.93365">TX</tspan></text>
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#marker4462)"
+ d="m 55.075395,626.64791 142.871835,0"
+ id="path4164"
+ inkscape:connector-curvature="0" />
+ <path
+ inkscape:connector-curvature="0"
+ id="path4166"
+ d="m 834.85716,626.64794 142.87183,0"
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow1Lend)" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="693.68311"
+ y="522.13812"
+ id="text4168"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4170"
+ x="693.68311"
+ y="522.13812">top_capitalisation</tspan></text>
+ <path
+ inkscape:connector-curvature="0"
+ id="path4172"
+ d="m 385.57141,626.64789 40.35714,0"
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1" />
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="m 609.57141,626.64789 40.35714,0"
+ id="path4174"
+ inkscape:connector-curvature="0" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:17.1706295px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-712.43713"
+ y="357.6622"
+ id="text4490"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-0.86921859,1.1504586,0,0,0)"><tspan
+ sodipodi:role="line"
+ id="tspan4492"
+ x="-712.43713"
+ y="357.6622">8bit parallel</tspan></text>
+ <text
+ transform="matrix(0,-0.86921859,1.1504586,0,0,0)"
+ sodipodi:linespacing="125%"
+ id="text4494"
+ y="553.23639"
+ x="-709.15009"
+ style="font-style:normal;font-weight:normal;font-size:17.1706295px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"><tspan
+ y="553.23639"
+ x="-709.15009"
+ id="tspan4496"
+ sodipodi:role="line">8bit parallel</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="110.25892"
+ y="516.77045"
+ id="text4517"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4519"
+ x="110.25892"
+ y="516.77045">board_clk</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="114.15372"
+ y="548.17877"
+ id="text4521"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4523"
+ x="114.15372"
+ y="548.17877">reset</tspan></text>
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#marker5229)"
+ d="m 58.131259,544.64792 40.588544,0"
+ id="path5227"
+ inkscape:connector-curvature="0" />
+ <path
+ inkscape:connector-curvature="0"
+ id="path5515"
+ d="m 58.131259,508.64792 40.588544,0"
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#marker5517)" />
+ </g>
+</svg>
diff --git a/doc/using/UART_srcs/file_in_out/makefile b/doc/using/UART_srcs/file_in_out/makefile
new file mode 100644
index 000000000..e7ee72400
--- /dev/null
+++ b/doc/using/UART_srcs/file_in_out/makefile
@@ -0,0 +1,13 @@
+all:
+ rm -rf work
+ mkdir work
+
+ ghdl -a --work=work --workdir=work ../capitalisation/capitalisation.vhd
+ ghdl -a --work=work --workdir=work tb_file.vhd
+ ghdl -e --ieee=synopsys -fexplicit --workdir=work -Pwork tb_file
+ ghdl -r tb_file --wave=tbench.ghw --stop-time=200us
+
+
+view:
+ gtkwave tbench.ghw a.gtkw
+
diff --git a/doc/using/UART_srcs/file_in_out/tb_file.vhd b/doc/using/UART_srcs/file_in_out/tb_file.vhd
new file mode 100644
index 000000000..fe18f6665
--- /dev/null
+++ b/doc/using/UART_srcs/file_in_out/tb_file.vhd
@@ -0,0 +1,142 @@
+--tb_file.vhd
+------------------------------------------------------------------------
+LIBRARY ieee;
+USE ieee.std_logic_1164.ALL;
+USE ieee.numeric_std.ALL;
+
+ENTITY tb_file IS
+END tb_file;
+--vhdl no seek or rewind function in VHDL
+
+ARCHITECTURE behavior OF tb_file IS
+
+signal clk : std_logic := '0';
+signal reset : std_logic;
+
+signal rdata : std_logic_vector(7 downto 0);
+signal rd_en : std_logic;
+signal rd : std_logic;
+
+signal wdata : std_logic_vector(7 downto 0);
+signal wr_en : std_logic:='1';
+signal wr : std_logic;
+
+ -- Component Declaration for the Unit Under Test (UUT)
+component capitalisation is
+ port(
+ clk : in std_logic;
+ reset : in std_logic;
+ --in
+ rdata : in std_logic_vector(7 downto 0);
+ rd_en : in std_logic;
+ rd : out std_logic;
+ --out
+ wdata : out std_logic_vector(7 downto 0);
+ wr_en : in std_logic;
+ wr : out std_logic
+ );
+end component;
+
+ -- Clock period definitions
+ constant clk_period : time := 10 ns;
+
+subtype by_te is character;
+type f_byte is file of by_te;
+
+BEGIN
+
+process(clk)
+begin
+ if rising_edge (clk) then
+ if reset='0' then
+ wr_en<='1';
+ else
+ wr_en<='0';
+ end if;
+ end if;
+end process;
+
+--read a file
+process (reset,clk)
+constant file_name: string:="test.txt";
+file in_file: f_byte open read_mode is file_name;
+
+variable a:character;
+
+begin
+ if reset='1' then
+ rd_en<='0';
+ else
+
+ if rising_edge(clk) then
+ if rd_en='0' or rd='1' then
+ if not endfile (in_file) then
+ read(in_file,a);
+ rdata<=std_logic_vector(to_unsigned(character'pos(a),8));
+ --very tricky the conversation
+ rd_en<='1';
+ else
+ rd_en<='0';
+ end if;
+ end if;
+ end if;
+ --wait until rising_edge(CLK) and rd='1';
+ end if;
+end process;
+
+
+
+--write a file
+process (clk)
+constant file_name: string:="test1.txt";
+file out_file: f_byte open write_mode is file_name;
+
+----variable in_line,out_line: line;
+variable b:character;
+
+ begin
+ if rising_edge(CLK) then
+ if reset='0' then
+ if wr='1' then
+ b:=character'val(to_integer(unsigned(wdata)));
+ write(out_file,b);
+ end if;
+ end if;
+ end if;
+ end process;
+
+ stim_proc : process
+ begin
+ reset <= '1';
+
+ wait for 50 ns;
+ reset <='0';
+
+ wait;
+ end process;
+
+ clk_process :process
+ begin
+ clk <= '0';
+ wait for clk_period/2;
+ clk <= '1';
+ wait for clk_period/2;
+ end process;
+
+engine: capitalisation
+ port map(
+
+ clk => clk,
+ reset => reset,
+
+ rdata => rdata,
+ rd_en => rd_en,
+ rd => rd,
+
+ wdata => wdata,
+ wr_en => wr_en,
+ wr => wr
+ );
+
+
+END;
diff --git a/doc/using/UART_srcs/file_in_out/test.txt b/doc/using/UART_srcs/file_in_out/test.txt
new file mode 100644
index 000000000..3ee58d9a3
--- /dev/null
+++ b/doc/using/UART_srcs/file_in_out/test.txt
@@ -0,0 +1 @@
+Hallo world! Can you see my text?
diff --git a/doc/using/UART_srcs/file_in_out/test1.txt b/doc/using/UART_srcs/file_in_out/test1.txt
new file mode 100644
index 000000000..a868f3f93
--- /dev/null
+++ b/doc/using/UART_srcs/file_in_out/test1.txt
@@ -0,0 +1 @@
+HALLO WORLD! CAN YOU SEE MY TEXT?
diff --git a/doc/using/UART_srcs/file_in_out/zeichnung.png b/doc/using/UART_srcs/file_in_out/zeichnung.png
new file mode 100644
index 000000000..e849417f4
--- /dev/null
+++ b/doc/using/UART_srcs/file_in_out/zeichnung.png
Binary files differ
diff --git a/doc/using/UART_srcs/rx/UART_RX_8N1.vhd b/doc/using/UART_srcs/rx/UART_RX_8N1.vhd
new file mode 100644
index 000000000..a7fe757a5
--- /dev/null
+++ b/doc/using/UART_srcs/rx/UART_RX_8N1.vhd
@@ -0,0 +1,150 @@
+-- UART_RX_8N1.vhd
+----------------------------------------------------------------------
+library IEEE;
+use IEEE.STD_LOGIC_1164.all;
+use ieee.numeric_std.all;
+
+
+entity UART_8N1_RX is
+
+ generic (clk_freq : integer;
+ baudrate : integer);
+ port(
+ clk : in std_logic;
+ reset : in std_logic;
+ --8bit interface
+ rdata : out std_logic_vector(7 downto 0);
+ rd : in std_logic;
+ rd_en : out std_logic;
+ --physical wire RX
+ rx : in std_logic
+ );
+end UART_8N1_RX;
+
+
+architecture Behavioral of UART_8N1_RX is
+
+ type state_type is (idle, start, data0, data1, data2, data3, data4,
+ data5, data6, data7, stop);
+ signal state : state_type;
+
+ signal puffer : std_logic_vector (7 downto 0);
+
+--FIFO
+ type RAM is array (0 to 63) of std_logic_vector (7 downto 0);
+
+ signal fifo : RAM ;
+
+ signal nextwrite : unsigned(5 downto 0);
+ signal nextread : unsigned(5 downto 0);
+
+ constant tick : integer := clk_freq/baudrate;
+ signal tick_counter : integer range 0 to (tick+1);
+
+
+begin
+
+ rdata <= fifo(to_integer(nextread));
+
+ process (clk)
+ begin
+ if rising_edge(clk) then
+ if rd = '1' then
+ nextread <= nextread+1;
+ end if;
+ if reset = '1' then
+ nextread <= (others => '0');
+ end if;
+ end if;
+ end process;
+
+ rd_en<= '0' when nextread=nextwrite else '1';
+
+
+ process(clk)
+ begin
+
+ if (clk'event and clk = '1') then
+ tick_counter <= tick_counter + 1;
+
+ case state is
+
+ when idle =>
+ tick_counter <= 0;
+ if (rx = '0') then --check start condtion
+ state <= start;
+ else
+ state <= idle;
+ end if;
+
+ when start =>
+ if (tick_counter = tick/2) then --capture in the middle
+ tick_counter <= 0;
+ state <= data0;
+ end if;
+
+ when data0 =>
+ if (tick_counter = tick) then
+ puffer (0) <= rx;
+ tick_counter <= 0;
+ state <= data1;
+ end if;
+ when data1 =>
+ if (tick_counter = tick) then
+ puffer (1) <= rx;
+ tick_counter <= 0;
+ state <= data2;
+ end if;
+ when data2 =>
+ if (tick_counter = tick) then
+ puffer (2) <= rx;
+ tick_counter <= 0;
+ state <= data3;
+ end if;
+ when data3 =>
+ if (tick_counter = tick) then
+ puffer(3) <= rx;
+ tick_counter <= 0;
+ state <= data4;
+ end if;
+ when data4 =>
+ if (tick_counter = tick) then
+ puffer (4) <= rx;
+ tick_counter <= 0;
+ state <= data5;
+ end if;
+ when data5 =>
+ if (tick_counter = tick) then
+ puffer (5) <= rx;
+ tick_counter <= 0;
+ state <= data6;
+ end if;
+ when data6 =>
+ if (tick_counter = tick) then
+ puffer (6) <= rx;
+ tick_counter <= 0;
+ state <= data7;
+ end if;
+ when data7 =>
+ if (tick_counter = tick) then
+ puffer (7) <= rx;
+ tick_counter <= 0;
+ state <= stop;
+ end if;
+ when stop =>
+ if (tick_counter = tick) then
+ fifo(to_integer(nextwrite)) <= puffer;
+ nextwrite <= nextwrite+1;
+ tick_counter <= 0;
+ state <= idle;
+ end if;
+ end case;
+ if reset='1' then
+ state <=idle;
+ nextwrite <= (others => '0');
+ end if;
+ end if;
+
+ end process;
+end Behavioral;
+
diff --git a/doc/using/UART_srcs/rx/makefile b/doc/using/UART_srcs/rx/makefile
new file mode 100644
index 000000000..3546a42ad
--- /dev/null
+++ b/doc/using/UART_srcs/rx/makefile
@@ -0,0 +1,8 @@
+
+all:
+ ghdl -i *.vhd
+ ghdl -m tb_UART_RX_8N1
+ ghdl -r tb_UART_RX_8N1 --stop-time=800us --wave=RX.ghw
+
+view:
+ gtkwave RX.ghw
diff --git a/doc/using/UART_srcs/rx/sim_RX.png b/doc/using/UART_srcs/rx/sim_RX.png
new file mode 100644
index 000000000..5062d26a3
--- /dev/null
+++ b/doc/using/UART_srcs/rx/sim_RX.png
Binary files differ
diff --git a/doc/using/UART_srcs/rx/tb_UART_RX_8N1.vhd b/doc/using/UART_srcs/rx/tb_UART_RX_8N1.vhd
new file mode 100644
index 000000000..4fd67c8e7
--- /dev/null
+++ b/doc/using/UART_srcs/rx/tb_UART_RX_8N1.vhd
@@ -0,0 +1,121 @@
+-- tb_UART_RX_8N1.vhd
+----------------------------------------------------------------------
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+
+entity tb_UART_RX_8N1 is
+end tb_UART_RX_8N1;
+
+architecture behavior of tb_UART_RX_8N1 is
+
+ signal board_clk : std_logic := '0';
+ signal reset : std_logic := '0';
+ signal rx : std_logic := '1';
+ signal rd : std_logic := '0';
+ signal rd_en : std_logic;
+ signal data : std_logic_vector (7 downto 0);
+
+ procedure tx_char (signal txpin : out std_logic;
+ txdata : in character; baudrate : in integer) is
+ constant bittime : time := (integer(1000000000.0/real(baudrate))) * 1 ns;
+ variable c : std_logic_vector(7 downto 0);
+ begin
+ c := std_logic_vector(to_unsigned(character'pos(txdata), 8));
+ txpin <= '0'; -- Startbit
+ wait for bittime;
+ for i in 0 to 7 loop
+ txpin <= c(i);
+ wait for bittime;
+ end loop;
+ txpin <= '1'; -- Stopbit
+ wait for bittime;
+ end tx_char;
+ --Outputs
+
+component UART_8N1_RX is
+
+ generic (clk_freq : integer;
+ baudrate : integer);
+ port(
+ clk : in std_logic;
+ reset : in std_logic;
+ --8bit interface
+ rdata : out std_logic_vector(7 downto 0);
+ rd : in std_logic;
+ rd_en : out std_logic;
+ --physical wire RX
+ rx : in std_logic
+ );
+end component;
+
+ constant board_clk_period : time := 10 ns;
+ constant board_clk_freq: integer :=100E6; --100MHz
+
+begin
+
+ -- Instantiate the Unit Under Test (UUT)
+UART_RX:UART_8N1_RX
+
+ generic map (
+ clk_freq => board_clk_freq,
+ baudrate =>115200)
+ port map(
+ clk => board_clk,
+ reset => reset,
+ rdata => data,
+ rd => rd,
+ rd_en => rd_en,
+ --physical wire RX
+ rx => rx
+ );
+
+ process
+ begin
+ wait for 80000 ns;
+ tx_char(RX, '$', 115200);
+ tx_char(RX, 'g', 115200);
+ tx_char(RX, '#', 115200);
+ wait for 50 us;
+ tx_char(RX, '6', 115200);
+ tx_char(RX, '7', 115200);
+ wait; -- will wait forever
+ end process;
+
+ -- Clock process definitions
+ board_clk_process : process
+ begin
+ board_clk <= '0';
+ wait for board_clk_period/2;
+ board_clk <= '1';
+ wait for board_clk_period/2;
+ end process;
+
+ -- Stimulus process
+ process
+ begin
+ reset <= '1';
+ wait for 100 ns;
+ reset <='0';
+ wait;
+ end process;
+
+ -- Stimulus process
+ stim_proc : process
+ begin
+
+ loop
+ wait for 200 us;
+ wait until rising_edge(board_clk);
+ if rd_en='1' then
+ rd<= '1';
+ end if;
+ wait until rising_edge(board_clk);
+ rd<= '0';
+ end loop;
+
+ wait;
+ end process;
+
+ end;
diff --git a/doc/using/UART_srcs/tx/BlockTX.png b/doc/using/UART_srcs/tx/BlockTX.png
new file mode 100644
index 000000000..9031bb2f3
--- /dev/null
+++ b/doc/using/UART_srcs/tx/BlockTX.png
Binary files differ
diff --git a/doc/using/UART_srcs/tx/TX.ghw b/doc/using/UART_srcs/tx/TX.ghw
new file mode 100644
index 000000000..1af3cfed0
--- /dev/null
+++ b/doc/using/UART_srcs/tx/TX.ghw
Binary files differ
diff --git a/doc/using/UART_srcs/tx/TX.svg b/doc/using/UART_srcs/tx/TX.svg
new file mode 100644
index 000000000..35040d850
--- /dev/null
+++ b/doc/using/UART_srcs/tx/TX.svg
@@ -0,0 +1,395 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!-- Created with Inkscape (http://www.inkscape.org/) -->
+
+<svg
+ xmlns:dc="http://purl.org/dc/elements/1.1/"
+ xmlns:cc="http://creativecommons.org/ns#"
+ xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
+ xmlns:svg="http://www.w3.org/2000/svg"
+ xmlns="http://www.w3.org/2000/svg"
+ xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
+ xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
+ width="744.09448819"
+ height="1052.3622047"
+ id="svg2"
+ version="1.1"
+ inkscape:version="0.91 r13725"
+ sodipodi:docname="TX.svg"
+ inkscape:export-filename="/home/red/artikel_uart/tx/BlockTX.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90">
+ <defs
+ id="defs4">
+ <marker
+ inkscape:stockid="Arrow2Lend"
+ orient="auto"
+ refY="0.0"
+ refX="0.0"
+ id="Arrow2Lend"
+ style="overflow:visible;">
+ <path
+ id="path3823"
+ style="fill-rule:evenodd;stroke-width:0.62500000;stroke-linejoin:round;"
+ d="M 8.7185878,4.0337352 L -2.2072895,0.016013256 L 8.7185884,-4.0017078 C 6.9730900,-1.6296469 6.9831476,1.6157441 8.7185878,4.0337352 z "
+ transform="scale(1.1) rotate(180) translate(1,0)" />
+ </marker>
+ <marker
+ inkscape:stockid="Arrow1Mend"
+ orient="auto"
+ refY="0.0"
+ refX="0.0"
+ id="Arrow1Mend"
+ style="overflow:visible;">
+ <path
+ id="path3811"
+ d="M 0.0,0.0 L 5.0,-5.0 L -12.5,0.0 L 5.0,5.0 L 0.0,0.0 z "
+ style="fill-rule:evenodd;stroke:#000000;stroke-width:1.0pt;"
+ transform="scale(0.4) rotate(180) translate(10,0)" />
+ </marker>
+ </defs>
+ <sodipodi:namedview
+ id="base"
+ pagecolor="#ffffff"
+ bordercolor="#666666"
+ borderopacity="1.0"
+ inkscape:pageopacity="0.0"
+ inkscape:pageshadow="2"
+ inkscape:zoom="0.98994949"
+ inkscape:cx="322.39263"
+ inkscape:cy="657.39598"
+ inkscape:document-units="px"
+ inkscape:current-layer="layer1"
+ showgrid="false"
+ inkscape:window-width="1385"
+ inkscape:window-height="898"
+ inkscape:window-x="498"
+ inkscape:window-y="27"
+ inkscape:window-maximized="0" />
+ <metadata
+ id="metadata7">
+ <rdf:RDF>
+ <cc:Work
+ rdf:about="">
+ <dc:format>image/svg+xml</dc:format>
+ <dc:type
+ rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
+ <dc:title />
+ </cc:Work>
+ </rdf:RDF>
+ </metadata>
+ <g
+ inkscape:label="Layer 1"
+ inkscape:groupmode="layer"
+ id="layer1">
+ <path
+ style="fill:none;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)"
+ d="m 513.8103,332.36218 c 158.3947,0 158.3947,0 158.3947,0"
+ id="path4616"
+ inkscape:connector-curvature="0" />
+ <path
+ style="fill:none;stroke:#000000;stroke-width:0.99999994px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="m 302.99003,332.36218 c 368.43852,0 368.43852,0 368.43852,0"
+ id="path3756"
+ inkscape:connector-curvature="0" />
+ <path
+ style="fill:#ffffff;stroke:#000000;stroke-width:2;stroke-linecap:round;stroke-linejoin:miter;stroke-miterlimit:4;stroke-opacity:1;stroke-dashoffset:0"
+ d="m 473.12814,282.66415 61.61891,27.14285 0.71428,104.56593 -62.33319,27.85714 z"
+ id="rect2985"
+ inkscape:connector-curvature="0"
+ sodipodi:nodetypes="ccccc" />
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="471.74121"
+ y="524.05237"
+ id="text3758"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan3760"
+ x="471.74121"
+ y="524.05237">Idle</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="526.28943"
+ y="528.09302"
+ id="text3762"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan3764"
+ x="526.28943"
+ y="528.09302">Start</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="557.60413"
+ y="558.39758"
+ id="text3766"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan3768"
+ x="557.60413"
+ y="558.39758">Data0</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="420.22345"
+ y="581.6311"
+ id="text3770"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan3772"
+ x="420.22345"
+ y="581.6311">Data7</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="423.25394"
+ y="548.29602"
+ id="text3774"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan3776"
+ x="423.25394"
+ y="548.29602">Stop</tspan></text>
+ <text
+ sodipodi:linespacing="125%"
+ id="text3778"
+ y="582.6413"
+ x="566.6955"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ xml:space="preserve"><tspan
+ y="582.6413"
+ x="566.6955"
+ id="tspan3780"
+ sodipodi:role="line">Data1</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="546.43152"
+ y="612.94586"
+ id="text3782"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan3784"
+ x="546.43152"
+ y="612.94586">Data2</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="472.75137"
+ y="562.43817"
+ id="text3786"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan3788"
+ x="472.75137"
+ y="562.43817"
+ style="font-size:20px">State</tspan><tspan
+ sodipodi:role="line"
+ x="472.75137"
+ y="587.43817"
+ id="tspan3790"
+ style="font-size:20px">Machine</tspan></text>
+ <rect
+ style="fill:none;stroke:#000000;stroke-width:2;stroke-linecap:round;stroke-linejoin:miter;stroke-miterlimit:4;stroke-opacity:1;stroke-dasharray:none;stroke-dashoffset:0"
+ id="rect3792"
+ width="235.36554"
+ height="146.47212"
+ x="400.02042"
+ y="493.88995"
+ ry="73.236061"
+ rx="73.236061" />
+ <path
+ style="fill:none;stroke:#000000;stroke-width:1;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend);stroke-miterlimit:4;stroke-dasharray:1,4;stroke-dashoffset:0"
+ d="m 537.40116,614.96613 c -72.73099,-1.01015 -86.87312,8.08122 -94.95435,-9.09137 -8.08122,-17.1726 -11.05566,-23.36658 -11.05566,-23.36658"
+ id="path3796"
+ inkscape:connector-curvature="0"
+ sodipodi:nodetypes="csc" />
+ <rect
+ style="fill:#ffffff;stroke:#000000;stroke-width:2;stroke-linecap:round;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ id="rect4428"
+ width="114.28571"
+ height="219.28572"
+ x="195.57143"
+ y="273.79074"
+ rx="0"
+ ry="0" />
+ <path
+ inkscape:connector-curvature="0"
+ id="path4430"
+ d="m 313.29502,332.36218 c 158.3947,0 158.3947,0 158.3947,0"
+ style="fill:none;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)" />
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="617.70831"
+ y="324.54727"
+ id="text4618"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4620"
+ x="617.70831"
+ y="324.54727">TX</tspan></text>
+ <path
+ style="fill:none;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="m 510.12704,424.0473 c 0,68.1853 0,68.1853 0,68.1853"
+ id="path4622"
+ inkscape:connector-curvature="0" />
+ <path
+ style="fill:none;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="m 309.10668,478.09046 98.58101,56.91577"
+ id="path4624"
+ inkscape:connector-curvature="0" />
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="201.54575"
+ y="466.97879"
+ id="text4626"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4628"
+ x="201.54575"
+ y="466.97879">circular buffer</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="213.1422"
+ y="310.91022"
+ id="text4630"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4632"
+ x="213.1422"
+ y="310.91022">FIFO</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="482.34784"
+ y="334.6488"
+ id="text4634"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4636"
+ x="482.34784"
+ y="334.6488">MUX</tspan></text>
+ <path
+ style="fill:none;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)"
+ d="m 448.65546,384.36218 c 23.03426,0 23.03426,0 23.03426,0"
+ id="path4638"
+ inkscape:connector-curvature="0" />
+ <path
+ inkscape:connector-curvature="0"
+ id="path4640"
+ d="m 448.65546,302.31647 c 23.03426,0 23.03426,0 23.03426,0"
+ style="fill:none;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)" />
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="430.83005"
+ y="388.69196"
+ id="text4642"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4644"
+ x="430.83005"
+ y="388.69196">'1'</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="429.31482"
+ y="307.87976"
+ id="text4646"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4648"
+ x="429.31482"
+ y="307.87976">'0'</tspan></text>
+ <path
+ style="fill:none;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)"
+ d="m 144.39149,302.31647 49.29823,0"
+ id="path4650"
+ inkscape:connector-curvature="0"
+ sodipodi:nodetypes="cc" />
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="147.48227"
+ y="294.74777"
+ id="text4652"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4654"
+ x="147.48227"
+ y="294.74777">WR</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-size:16px;font-style:normal;font-weight:normal;line-height:125%;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;font-family:Sans"
+ x="147.98735"
+ y="333.13358"
+ id="text4656"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4658"
+ x="147.98735"
+ y="333.13358">DATA</tspan></text>
+ <path
+ inkscape:connector-curvature="0"
+ id="path4660"
+ d="m 141.36104,344.31647 52.32868,0"
+ style="fill:none;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)"
+ sodipodi:nodetypes="cc" />
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="m 394.96964,322.02189 -7.07106,18.18274"
+ id="path4199"
+ inkscape:connector-curvature="0"
+ sodipodi:nodetypes="cc" />
+ <path
+ sodipodi:nodetypes="cc"
+ inkscape:connector-curvature="0"
+ id="path4201"
+ d="m 170.71577,335.15387 -7.07106,18.18274"
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:15px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="382.84781"
+ y="356.36707"
+ id="text4203"
+ sodipodi:linespacing="125%"><tspan
+ sodipodi:role="line"
+ id="tspan4205"
+ x="382.84781"
+ y="356.36707">8</tspan></text>
+ <text
+ sodipodi:linespacing="125%"
+ id="text4207"
+ y="366.4686"
+ x="158.59395"
+ style="font-style:normal;font-weight:normal;font-size:15px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"><tspan
+ y="366.4686"
+ x="158.59395"
+ id="tspan4209"
+ sodipodi:role="line">8</tspan></text>
+ <text
+ sodipodi:linespacing="125%"
+ id="text4211"
+ y="410.73257"
+ x="139.36044"
+ style="font-style:normal;font-weight:normal;font-size:16px;line-height:125%;font-family:Sans;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none"
+ xml:space="preserve"><tspan
+ y="410.73257"
+ x="139.36044"
+ id="tspan4213"
+ sodipodi:role="line">WR_EN</tspan></text>
+ <path
+ sodipodi:nodetypes="cc"
+ inkscape:connector-curvature="0"
+ id="path4207"
+ d="m 195.01774,420.31647 -49.29823,0"
+ style="fill:none;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)" />
+ </g>
+</svg>
diff --git a/doc/using/UART_srcs/tx/TX_simple.png b/doc/using/UART_srcs/tx/TX_simple.png
new file mode 100644
index 000000000..cdf10e0c6
--- /dev/null
+++ b/doc/using/UART_srcs/tx/TX_simple.png
Binary files differ
diff --git a/doc/using/UART_srcs/tx/UART_TX_8N1.vhd b/doc/using/UART_srcs/tx/UART_TX_8N1.vhd
new file mode 100644
index 000000000..c8fd80b4a
--- /dev/null
+++ b/doc/using/UART_srcs/tx/UART_TX_8N1.vhd
@@ -0,0 +1,162 @@
+-- UART_TX_8N1.vhd
+----------------------------------------------------------------------
+library IEEE;
+use IEEE.STD_LOGIC_1164.all;
+use ieee.numeric_std.all;
+
+--UART transmiter without parity
+
+entity UART_8N1_TX is
+ generic(
+ clk_freq : integer;
+ baudrate : integer;
+ addr_depth : integer:=5);
+ port(
+ clk : in std_logic;
+ reset : in std_logic;
+ --8bit interface
+ wdata : in std_logic_vector(7 downto 0);
+ wr : in std_logic;
+ wr_en : out std_logic;
+
+ --physical wire
+ tx : out std_logic);
+end;
+
+
+architecture Behavioral of UART_8N1_TX is
+--FSM
+ type state_type is (idle, start, data0, data1, data2, data3, data4,
+ data5, data6, data7, stop);
+
+ signal state : state_type := idle;
+ signal nextstate : state_type := idle;
+
+ --FIFO
+ type RAM is array (0 to (2**(addr_depth)-1)) of std_logic_vector (7 downto 0);
+ signal fifo : RAM;
+ signal nextwrite : unsigned((addr_depth-1) downto 0);
+ signal nextread : unsigned((addr_depth-1) downto 0);
+
+ signal send_empty: std_logic;
+
+ --output
+ signal data_tx : std_logic_vector (7 downto 0);
+ constant tick : integer := (clk_freq/baudrate);
+ signal tick_counter : integer range 0 to (tick+1);
+
+begin
+
+ wr_en <= '0' when (nextwrite+1 = nextread) else '1';
+ send_empty<='1' when nextwrite=nextread else '0';
+
+ process(clk)
+ begin
+ if rising_edge(clk) then
+ if reset = '1' then
+ nextread <= (others => '0');
+ elsif state = stop and nextstate = idle then
+ nextread <= nextread+1;
+ end if;
+ end if;
+ end process;
+
+ process(clk)
+ begin
+ if rising_edge(clk) then
+ state <= nextstate;
+ end if;
+ end process;
+
+ process(clk)
+ begin
+ if rising_edge(clk) then
+ if reset = '1' then
+ nextwrite <= (others => '0');
+ elsif wr = '1' then
+ fifo(to_integer(nextwrite)) <= wdata;
+ nextwrite <= nextwrite+1;
+
+ end if;
+ end if;
+ end process;
+
+
+ data_tx <= fifo(to_integer(nextread));
+
+ process(clk)
+ begin
+ if rising_edge(clk) then
+ if state = idle then
+ if nextwrite /= nextread then
+ nextstate <= start;
+ tick_counter <= 0;
+ tx <= '0';
+ else
+ tx <= '1';
+ end if;
+ else
+ if tick_counter = tick then
+ tick_counter <= 0;
+ else
+ tick_counter <= tick_counter + 1;
+ end if;
+ end if;
+ if tick_counter = tick then
+ if state = start then
+ nextstate <= data0;
+ tx <= data_tx(0);
+ end if;
+
+ if state = data0 then
+ nextstate <= data1;
+ tx <= data_tx(1);
+ end if;
+
+ if state = data1 then
+ nextstate <= data2;
+ tx <= data_tx(2);
+ end if;
+
+ if state = data2 then
+ nextstate <= data3;
+ tx <= data_tx(3);
+ end if;
+ if state = data3 then
+ nextstate <= data4;
+ tx <= data_tx(4);
+ end if;
+ if state = data4 then
+ nextstate <= data5;
+ tx <= data_tx(5);
+ end if;
+ if state = data5 then
+ nextstate <= data6;
+ tx <= data_tx(6);
+ end if;
+ if state = data6 then
+ nextstate <= data7;
+ tx <= data_tx(7);
+ end if;
+ if state = data7 then
+ nextstate <= stop;
+ tx <= '1';
+ end if;
+ if state = stop then
+ nextstate <= idle;
+ tx <= '1';
+ end if;
+ end if;
+
+ if reset = '1' then
+ tick_counter <= 0;
+ tx <= '1';
+ nextstate <= idle;
+ end if;
+ end if;
+
+ end process;
+
+
+end Behavioral;
+
diff --git a/doc/using/UART_srcs/tx/makefile b/doc/using/UART_srcs/tx/makefile
new file mode 100644
index 000000000..83168f2f1
--- /dev/null
+++ b/doc/using/UART_srcs/tx/makefile
@@ -0,0 +1,8 @@
+
+all:
+ ghdl -i *.vhd
+ ghdl -m tb_UART_TX_8N1
+ ghdl -r tb_UART_TX_8N1 --stop-time=200us --wave=TX.ghw
+
+view:
+ gtkwave TX.ghw
diff --git a/doc/using/UART_srcs/tx/path6054.png b/doc/using/UART_srcs/tx/path6054.png
new file mode 100644
index 000000000..d2c657243
--- /dev/null
+++ b/doc/using/UART_srcs/tx/path6054.png
Binary files differ
diff --git a/doc/using/UART_srcs/tx/tb_UART_TX_8N1.vhd b/doc/using/UART_srcs/tx/tb_UART_TX_8N1.vhd
new file mode 100644
index 000000000..a485a404a
--- /dev/null
+++ b/doc/using/UART_srcs/tx/tb_UART_TX_8N1.vhd
@@ -0,0 +1,95 @@
+-- tb_UART_TX_8N1.vhd
+----------------------------------------------------------------------
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity tb_UART_TX_8N1 is
+end tb_UART_TX_8N1;
+
+architecture behavior of tb_UART_TX_8N1 is
+
+ --Inputs
+ signal board_clk : std_logic := '0';
+ signal reset : std_logic := '0';
+ signal send_data : std_logic_vector (7 downto 0);
+ signal wr : std_logic := '0';
+ signal tx : std_logic;
+
+ -- Component Declaration for the Unit Under Test (UUT)
+ component UART_8N1_TX is
+ generic(
+ clk_freq : integer;
+ baudrate : integer;
+ addr_depth : integer:=5);
+ port(
+ clk : in std_logic;
+ reset : in std_logic;
+ --8bit interface
+ wdata : in std_logic_vector(7 downto 0);
+ wr : in std_logic;
+ wr_en : out std_logic;
+
+ --physical wire
+ tx : out std_logic);
+end component;
+
+ constant board_clk_period : time := 10 ns;
+ constant board_clk_freq: integer :=100E6; --100MHz
+
+begin
+
+ -- Instantiate the Unit Under Test (UUT)
+UART_TX: UART_8N1_TX
+ generic map(
+ clk_freq => board_clk_freq,
+ baudrate => 115200
+ -- addr_depth => use predefined
+ )
+ port map(
+ clk => board_clk,
+ reset => reset,
+
+ wdata => send_data,
+ wr => wr,
+ wr_en => open,
+
+ tx => tx
+ );
+
+ -- Clock process definitions
+ board_clk_process : process
+ begin
+ board_clk <= '0';
+ wait for board_clk_period/2;
+ board_clk <= '1';
+ wait for board_clk_period/2;
+ end process;
+
+
+ -- Stimulus process
+ stim_proc : process
+ begin
+ reset <= '1';
+
+ wait for 15 us;
+ reset <='0';
+ send_data<=X"A0";
+ wait until rising_edge(board_clk);
+ wr<= '1';
+
+ wait until rising_edge(board_clk);
+ wr<= '0';
+
+ wait for 5 us;
+
+ wait until rising_edge(board_clk);
+ wr<= '1';
+ send_data<=X"B1";
+
+ wait until rising_edge(board_clk);
+ wr<= '0';
+ wait;
+ end process;
+
+ end;
diff --git a/doc/using/UART_srcs/tx/tx.gtkw b/doc/using/UART_srcs/tx/tx.gtkw
new file mode 100644
index 000000000..92e8cd730
--- /dev/null
+++ b/doc/using/UART_srcs/tx/tx.gtkw
@@ -0,0 +1,33 @@
+[*]
+[*] GTKWave Analyzer v3.3.67 (w)1999-2015 BSI
+[*] Fri Dec 16 19:12:23 2016
+[*]
+[dumpfile] "/home/red/artikel_uart/tx/TX.ghw"
+[dumpfile_mtime] "Fri Dec 16 19:08:11 2016"
+[dumpfile_size] 349946
+[savefile] "/home/red/artikel_uart/tx/tx.gtkw"
+[timestart] 0
+[size] 1920 1016
+[pos] -83 -83
+*-35.000000 106965000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+[treeopen] top.
+[treeopen] top.tb_uart_tx_8n1.
+[treeopen] top.tb_uart_tx_8n1.uart_tx.
+[sst_width] 218
+[signals_width] 142
+[sst_expanded] 1
+[sst_vpaned_height] 215
+@28
+top.tb_uart_tx_8n1.board_clk
+top.tb_uart_tx_8n1.reset
+[color] 5
+top.tb_uart_tx_8n1.wr
+@22
+#{top.tb_uart_tx_8n1.send_data[7:0]} top.tb_uart_tx_8n1.send_data[7] top.tb_uart_tx_8n1.send_data[6] top.tb_uart_tx_8n1.send_data[5] top.tb_uart_tx_8n1.send_data[4] top.tb_uart_tx_8n1.send_data[3] top.tb_uart_tx_8n1.send_data[2] top.tb_uart_tx_8n1.send_data[1] top.tb_uart_tx_8n1.send_data[0]
+@200
+-FIFO_Control
+@22
+#{top.tb_uart_tx_8n1.uart_tx.nextread[4:0]} top.tb_uart_tx_8n1.uart_tx.nextread[4] top.tb_uart_tx_8n1.uart_tx.nextread[3] top.tb_uart_tx_8n1.uart_tx.nextread[2] top.tb_uart_tx_8n1.uart_tx.nextread[1] top.tb_uart_tx_8n1.uart_tx.nextread[0]
+#{top.tb_uart_tx_8n1.uart_tx.nextwrite[4:0]} top.tb_uart_tx_8n1.uart_tx.nextwrite[4] top.tb_uart_tx_8n1.uart_tx.nextwrite[3] top.tb_uart_tx_8n1.uart_tx.nextwrite[2] top.tb_uart_tx_8n1.uart_tx.nextwrite[1] top.tb_uart_tx_8n1.uart_tx.nextwrite[0]
+[pattern_trace] 1
+[pattern_trace] 0
diff --git a/doc/using/UART_srcs/uart.aux b/doc/using/UART_srcs/uart.aux
new file mode 100644
index 000000000..d5ba29b80
--- /dev/null
+++ b/doc/using/UART_srcs/uart.aux
@@ -0,0 +1,48 @@
+\relax
+\providecommand\hyper@newdestlabel[2]{}
+\providecommand\HyperFirstAtBeginDocument{\AtBeginDocument}
+\HyperFirstAtBeginDocument{\ifx\hyper@anchor\@undefined
+\global\let\oldcontentsline\contentsline
+\gdef\contentsline#1#2#3#4{\oldcontentsline{#1}{#2}{#3}}
+\global\let\oldnewlabel\newlabel
+\gdef\newlabel#1#2{\newlabelxx{#1}#2}
+\gdef\newlabelxx#1#2#3#4#5#6{\oldnewlabel{#1}{{#2}{#3}}}
+\AtEndDocument{\ifx\hyper@anchor\@undefined
+\let\contentsline\oldcontentsline
+\let\newlabel\oldnewlabel
+\fi}
+\fi}
+\global\let\hyper@last\relax
+\gdef\HyperFirstAtBeginDocument#1{#1}
+\providecommand\HyField@AuxAddToFields[1]{}
+\providecommand\HyField@AuxAddToCoFields[2]{}
+\@writefile{toc}{\contentsline {section}{\numberline {1}introduction UART transmission}{2}{section.1}}
+\@writefile{lof}{\contentsline {figure}{\numberline {1}{\ignorespaces UART Timing}}{2}{figure.1}}
+\newlabel{fig:UART Timing}{{1}{2}{UART Timing}{figure.1}{}}
+\@writefile{toc}{\contentsline {section}{\numberline {2}advanced TX Unit with FIFO}{2}{section.2}}
+\@writefile{lof}{\contentsline {figure}{\numberline {2}{\ignorespaces Blockdiagram TX}}{3}{figure.2}}
+\newlabel{fig:Blockdiagram}{{2}{3}{Blockdiagram TX}{figure.2}{}}
+\@writefile{lol}{\contentsline {lstlisting}{tx/UART\textunderscore TX\textunderscore 8N1.vhd}{3}{lstlisting.-1}}
+\@writefile{lof}{\contentsline {figure}{\numberline {3}{\ignorespaces FIFO pointer}}{6}{figure.3}}
+\newlabel{fig:FIFO pointer}{{3}{6}{FIFO pointer}{figure.3}{}}
+\@writefile{lol}{\contentsline {lstlisting}{tx/tb\textunderscore UART\textunderscore TX\textunderscore 8N1.vhd}{6}{lstlisting.-2}}
+\@writefile{lof}{\contentsline {figure}{\numberline {4}{\ignorespaces UART TX output}}{8}{figure.4}}
+\@writefile{toc}{\contentsline {section}{\numberline {3}advanced RX Unit with FIFO}{8}{section.3}}
+\@writefile{lol}{\contentsline {lstlisting}{rx/UART\textunderscore RX\textunderscore 8N1.vhd}{9}{lstlisting.-3}}
+\@writefile{lol}{\contentsline {lstlisting}{rx/tb\textunderscore UART\textunderscore RX\textunderscore 8N1.vhd}{11}{lstlisting.-4}}
+\@writefile{lof}{\contentsline {figure}{\numberline {5}{\ignorespaces UART RX in}}{13}{figure.5}}
+\newlabel{fig:sim RX}{{5}{13}{UART RX in}{figure.5}{}}
+\@writefile{toc}{\contentsline {section}{\numberline {4}example application}{13}{section.4}}
+\@writefile{lol}{\contentsline {lstlisting}{capitalisation/capitalisation.vhd}{14}{lstlisting.-5}}
+\@writefile{lol}{\contentsline {lstlisting}{capitalisation/top\textunderscore capitalisation.vhd}{15}{lstlisting.-6}}
+\@writefile{lol}{\contentsline {lstlisting}{capitalisation/tb\textunderscore capitalisation.vhd}{17}{lstlisting.-7}}
+\@writefile{lof}{\contentsline {figure}{\numberline {6}{\ignorespaces capitalisation}}{18}{figure.6}}
+\newlabel{fig:capitalisation}{{6}{18}{capitalisation}{figure.6}{}}
+\@writefile{toc}{\contentsline {section}{\numberline {5}Makefile for workflow}{19}{section.5}}
+\@writefile{toc}{\contentsline {section}{\numberline {6}file in/out}{19}{section.6}}
+\@writefile{lol}{\contentsline {lstlisting}{file\textunderscore in\textunderscore out/tb\textunderscore file.vhd}{20}{lstlisting.-8}}
+\@writefile{toc}{\contentsline {section}{\numberline {7}VHPI Interface to an other language}{22}{section.7}}
+\@writefile{lol}{\contentsline {lstlisting}{vhpi/tty.c}{23}{lstlisting.-9}}
+\@writefile{lol}{\contentsline {lstlisting}{vhpi/tty\textunderscore pkg.vhd}{24}{lstlisting.-10}}
+\@writefile{lol}{\contentsline {lstlisting}{vhpi/tb\textunderscore tty.vhd}{25}{lstlisting.-11}}
+\@writefile{toc}{\contentsline {section}{\numberline {8}closing words}{28}{section.8}}
diff --git a/doc/using/UART_srcs/uart.fdb_latexmk b/doc/using/UART_srcs/uart.fdb_latexmk
new file mode 100644
index 000000000..616ea3e48
--- /dev/null
+++ b/doc/using/UART_srcs/uart.fdb_latexmk
@@ -0,0 +1,87 @@
+# Fdb version 3
+["pdflatex"] 1474141784 "uart.tex" "uart.pdf" "uart" 1474141785
+ "/etc/texmf/web2c/texmf.cnf" 1372417701 32852 7187d1444a1804d82f3844a397e6bfda ""
+ "/usr/share/texmf/fonts/enc/dvips/lm/lm-ec.enc" 1254269338 2375 baa924870cfb487815765f9094cf3728 ""
+ "/usr/share/texmf/fonts/map/fontname/texfonts.map" 1272929888 3287 e6b82fe08f5336d4d5ebc73fb1152e87 ""
+ "/usr/share/texmf/fonts/map/pdftex/updmap/pdftex.map" 1369705486 1072720 61c8b26b04736286421720ab54bbc1b4 ""
+ "/usr/share/texmf/fonts/tfm/jknappen/ec/ecrm1095.tfm" 1136768653 3584 929cdff2b7a8c11bd4d49fd68cb0ae70 ""
+ "/usr/share/texmf/fonts/tfm/public/cm/cmr10.tfm" 1136768653 1296 45809c5a464d5f32c8f98ba97c1bb47f ""
+ "/usr/share/texmf/fonts/tfm/public/lm/ec-lmbx10.tfm" 1254269338 12076 b54175e02101bea1addf6b2d0197ed12 ""
+ "/usr/share/texmf/fonts/tfm/public/lm/ec-lmbx12.tfm" 1254269338 12088 d750ac78274fa7c9f73ba09914c04f8a ""
+ "/usr/share/texmf/fonts/tfm/public/lm/ec-lmr10.tfm" 1254269338 12056 7e13df7fe4cbce21b072ba7c4f4deb6e ""
+ "/usr/share/texmf/fonts/tfm/public/lm/ec-lmr12.tfm" 1254269338 12092 7b1546e2d096cfd5dcbd4049b0b1ec2e ""
+ "/usr/share/texmf/fonts/tfm/public/lm/ec-lmr17.tfm" 1254269338 12156 ca1ae6a3c8564e89597f1f993fba1608 ""
+ "/usr/share/texmf/fonts/tfm/public/lm/ec-lmr8.tfm" 1254269338 12064 a35db870f0b76c338d749c56dc030ef5 ""
+ "/usr/share/texmf/fonts/tfm/public/lm/ec-lmtk10.tfm" 1254269338 1368 5bfeb1cf8f9f0acdb7436bfaa8e0da4e ""
+ "/usr/share/texmf/fonts/tfm/public/lm/ec-lmtt10.tfm" 1254269338 1372 2ef2c2b492b3c4cd7879fe083abbb061 ""
+ "/usr/share/texmf/fonts/tfm/public/lm/ec-lmtt8.tfm" 1254269338 1380 64228d979098ac090aa3f98d5aa8ad3e ""
+ "/usr/share/texmf/fonts/tfm/public/lm/lmex10.tfm" 1148093231 992 ce925c9346c7613270a79afbee98c070 ""
+ "/usr/share/texmf/fonts/tfm/public/lm/lmmi12.tfm" 1148093231 1524 753b192b18f2991794f9d41a8228510b ""
+ "/usr/share/texmf/fonts/tfm/public/lm/lmmi6.tfm" 1148093231 1512 94a3fd88c6f27dbd9ecb46987e297a4e ""
+ "/usr/share/texmf/fonts/tfm/public/lm/lmmi8.tfm" 1148093231 1520 a3fe5596932db2db2cbda300920dd4e9 ""
+ "/usr/share/texmf/fonts/tfm/public/lm/lmsy10.tfm" 1148093231 1308 02cc510f9dd6012e5815d0c0ffbf6869 ""
+ "/usr/share/texmf/fonts/tfm/public/lm/lmsy6.tfm" 1148093231 1300 b0605d44c16c22d99dc001808e4f24ea ""
+ "/usr/share/texmf/fonts/tfm/public/lm/lmsy8.tfm" 1148093231 1304 cdc9a17df9ef0d2dc320eff37bbab1c4 ""
+ "/usr/share/texmf/fonts/tfm/public/lm/rm-lmr12.tfm" 1254269338 11888 6841b91e46b65cf41a49b160e6e74130 ""
+ "/usr/share/texmf/fonts/tfm/public/lm/rm-lmr6.tfm" 1254269338 11836 e3b6ce3e601aec94f64a536e7f4224d5 ""
+ "/usr/share/texmf/fonts/tfm/public/lm/rm-lmr8.tfm" 1254269338 11864 309fd7f43e4a0ba39f6f7644d76e8edf ""
+ "/usr/share/texmf/fonts/type1/public/lm/lmbx10.pfb" 1255129361 121021 1bf809ce4a594679006bd72263eba59b ""
+ "/usr/share/texmf/fonts/type1/public/lm/lmbx12.pfb" 1255129361 116908 1fca96723793882c2e0160350c192fc8 ""
+ "/usr/share/texmf/fonts/type1/public/lm/lmr10.pfb" 1255129361 119235 f35b44530a1d90eb90fe15d9cba67ea0 ""
+ "/usr/share/texmf/fonts/type1/public/lm/lmr12.pfb" 1255129361 113634 f99c44d58bae0863375faf0e1d74d612 ""
+ "/usr/share/texmf/fonts/type1/public/lm/lmr17.pfb" 1255129361 119752 1bd8d06e4079df624bf59ce3ad7c9aa6 ""
+ "/usr/share/texmf/fonts/type1/public/lm/lmtk10.pfb" 1255129361 117319 7f8361f845845ce6d5b36cbd9f9cf377 ""
+ "/usr/share/texmf/fonts/type1/public/lm/lmtt8.pfb" 1255129361 115291 2ae7034c644e971beb573b1e6606f863 ""
+ "/usr/share/texmf/tex/context/base/supp-pdf.mkii" 1337017135 71627 94eb9990bed73c364d7f53f960cc8c5b ""
+ "/usr/share/texmf/tex/generic/oberdiek/etexcmds.sty" 1335995445 7612 c47308d923ec19888707b0f1792b326a ""
+ "/usr/share/texmf/tex/generic/oberdiek/ifluatex.sty" 1303254447 7324 11d14f318d865f420e692d4e6c9c18c3 ""
+ "/usr/share/texmf/tex/generic/oberdiek/ifpdf.sty" 1303254447 7140 ece2cc23d9f20e1f53975ac167f42d3e ""
+ "/usr/share/texmf/tex/generic/oberdiek/infwarerr.sty" 1335995445 8253 3bdedc8409aa5d290a2339be6f09af03 ""
+ "/usr/share/texmf/tex/generic/oberdiek/kvdefinekeys.sty" 1335995445 5152 387d9200f396b498d5fd679ae44ed898 ""
+ "/usr/share/texmf/tex/generic/oberdiek/kvsetkeys.sty" 1335995445 14040 8de9f47fabc4ca3bd69b6d795e32751c ""
+ "/usr/share/texmf/tex/generic/oberdiek/ltxcmds.sty" 1335995445 18425 775b341047ce304520cc7c11ca41392e ""
+ "/usr/share/texmf/tex/generic/oberdiek/pdftexcmds.sty" 1335995445 19987 01cb2f3c1d21e5f05711b7fd50b17f2a ""
+ "/usr/share/texmf/tex/latex/base/article.cls" 1254151887 20571 b8bd218bf2e18b4f5817ee643cd9c515 ""
+ "/usr/share/texmf/tex/latex/base/fontenc.sty" 1254151887 4435 b97063eb2f20be499e7725926af85c55 ""
+ "/usr/share/texmf/tex/latex/base/inputenc.sty" 1254151887 4388 1cb2ca8d423695bd22ea8d126c276f33 ""
+ "/usr/share/texmf/tex/latex/base/omsenc.dfu" 1254151887 1868 39c80c053f689193a1ca9a83d05b2744 ""
+ "/usr/share/texmf/tex/latex/base/ot1enc.dfu" 1254151887 2620 9a36ef7e0369aa29d9d298a6bf19588e ""
+ "/usr/share/texmf/tex/latex/base/size11.clo" 1254151887 9058 640f9c40a6d912e30839a669c8a999ec ""
+ "/usr/share/texmf/tex/latex/base/t1enc.def" 1254151887 9172 67c33288b50eb57eab968f345e8befb0 ""
+ "/usr/share/texmf/tex/latex/base/t1enc.dfu" 1254151887 7480 2a6bcf9edfeb9ff088a3f0cf7f1a196c ""
+ "/usr/share/texmf/tex/latex/base/utf8.def" 1254151887 6350 d390538f995713c986118b8607d58f49 ""
+ "/usr/share/texmf/tex/latex/graphics/graphics.sty" 1254151804 14183 42a8fc761b806986eef292369afc2988 ""
+ "/usr/share/texmf/tex/latex/graphics/graphicx.sty" 1156702488 7882 3bd78469d444e8d494e27cfd7ca92719 ""
+ "/usr/share/texmf/tex/latex/graphics/keyval.sty" 1156702488 2266 7054435e4584a41cf53b0a7ca624d0cb ""
+ "/usr/share/texmf/tex/latex/graphics/trig.sty" 1156702488 3153 c50e6bd54d2dd3933fc52bcf369bec4a ""
+ "/usr/share/texmf/tex/latex/latexconfig/color.cfg" 1254097189 802 7b8c8d72c24d795ed7720e4dfd29bff3 ""
+ "/usr/share/texmf/tex/latex/latexconfig/epstopdf-sys.cfg" 1279039959 678 4792914a8f45be57bb98413425e4c7af ""
+ "/usr/share/texmf/tex/latex/latexconfig/graphics.cfg" 1278958963 3563 d35e897cae3b8c6848f6677b73370b54 ""
+ "/usr/share/texmf/tex/latex/listings/listings.cfg" 1213130811 1745 ae6fbed3255376b850f8b4ef89faef50 ""
+ "/usr/share/texmf/tex/latex/listings/listings.sty" 1213130811 80175 a550732aef92a278ec9bed572025bd8e ""
+ "/usr/share/texmf/tex/latex/listings/lstmisc.sty" 1213130811 76974 d9d4762e984ff3346653b91fbcf676e9 ""
+ "/usr/share/texmf/tex/latex/lm/lmodern.sty" 1257296302 1606 c17281c7cff2bbd7ff0173e1433487ec ""
+ "/usr/share/texmf/tex/latex/lm/omllmm.fd" 1257296302 888 44447a3a3af84a22454ef89500942d93 ""
+ "/usr/share/texmf/tex/latex/lm/omslmsy.fd" 1257296302 805 af340a8260c447aa315cfc740ff0152f ""
+ "/usr/share/texmf/tex/latex/lm/omxlmex.fd" 1257296302 566 a94661f7b66063f191960bb7935b6ba2 ""
+ "/usr/share/texmf/tex/latex/lm/ot1lmr.fd" 1257296302 1880 bae7b659316f7344a86218ad38b01d91 ""
+ "/usr/share/texmf/tex/latex/lm/t1lmr.fd" 1257296302 1865 afbfccbe7fda9c2dc5078ad7c486bbed ""
+ "/usr/share/texmf/tex/latex/lm/t1lmtt.fd" 1257296302 2681 354015af3b61e7be30009f084986375a ""
+ "/usr/share/texmf/tex/latex/oberdiek/epstopdf-base.sty" 1303254447 12029 04d7fdf76e0464c23b5aa3a727952d7c ""
+ "/usr/share/texmf/tex/latex/oberdiek/grfext.sty" 1335995445 7075 bd0c34fbf1ae8fd1debd2a554e41b2d5 ""
+ "/usr/share/texmf/tex/latex/oberdiek/kvoptions.sty" 1335995445 22417 c74ff4af6a1aa2b65d1924020edbbe11 ""
+ "/usr/share/texmf/tex/latex/pdftex-def/pdftex.def" 1306616590 55368 3c8a0d99822330f2dfabc0dfb09ce897 ""
+ "/usr/share/texmf/tex/latex/tools/verbatim.sty" 1312409015 7125 6b8323deb5c5c3a19b248762654143eb ""
+ "/usr/share/texmf/tex/latex/xcolor/xcolor.sty" 1169481954 55224 a43bab84e0ac5e6efcaf9a98bde73a94 ""
+ "/var/lib/texmf/web2c/pdftex/pdflatex.fmt" 1452093766 3819039 8e122683099cf58faae1b18e128467d4 ""
+ "UART_timing.png" 1474092153 14715 daee26772d3138b22087df53c27f62c5 ""
+ "tx/UART_TX_8N1.vhd" 1474137368 3654 7e81c46ba839241d05b546576e0c681f ""
+ "uart.aux" 1474141784 409 316a848a2221348e09ae8d8398ef2e79 ""
+ "uart.tex" 1474141784 1869 d709653d1ca825b52a2edb79fe814276 ""
+ "uart.toc" 1474141784 144 d55937a911f0fd8108b8e171eb6c5961 ""
+ (generated)
+ "uart.log"
+ "tx/UART_TX_8N1.vhd.aux"
+ "uart.pdf"
+ "uart.toc"
+ "uart.aux"
diff --git a/doc/using/UART_srcs/uart.fls b/doc/using/UART_srcs/uart.fls
new file mode 100644
index 000000000..3f021cce4
--- /dev/null
+++ b/doc/using/UART_srcs/uart.fls
@@ -0,0 +1,139 @@
+PWD /home/red/artikel_uart
+INPUT /etc/texmf/web2c/texmf.cnf
+INPUT /var/lib/texmf/web2c/pdftex/pdflatex.fmt
+INPUT uart.tex
+OUTPUT uart.log
+INPUT /usr/share/texmf/tex/latex/base/article.cls
+INPUT /usr/share/texmf/tex/latex/base/article.cls
+INPUT /usr/share/texmf/tex/latex/base/size11.clo
+INPUT /usr/share/texmf/tex/latex/base/size11.clo
+INPUT /usr/share/texmf/fonts/map/fontname/texfonts.map
+INPUT /usr/share/texmf/fonts/tfm/public/cm/cmr10.tfm
+INPUT /usr/share/texmf/tex/latex/base/fontenc.sty
+INPUT /usr/share/texmf/tex/latex/base/fontenc.sty
+INPUT /usr/share/texmf/tex/latex/base/t1enc.def
+INPUT /usr/share/texmf/tex/latex/base/t1enc.def
+INPUT /usr/share/texmf/fonts/tfm/jknappen/ec/ecrm1095.tfm
+INPUT /usr/share/texmf/tex/latex/base/inputenc.sty
+INPUT /usr/share/texmf/tex/latex/base/inputenc.sty
+INPUT /usr/share/texmf/tex/latex/base/utf8.def
+INPUT /usr/share/texmf/tex/latex/base/utf8.def
+INPUT /usr/share/texmf/tex/latex/base/t1enc.dfu
+INPUT /usr/share/texmf/tex/latex/base/t1enc.dfu
+INPUT /usr/share/texmf/tex/latex/base/ot1enc.dfu
+INPUT /usr/share/texmf/tex/latex/base/ot1enc.dfu
+INPUT /usr/share/texmf/tex/latex/base/omsenc.dfu
+INPUT /usr/share/texmf/tex/latex/base/omsenc.dfu
+INPUT /usr/share/texmf/tex/latex/lm/lmodern.sty
+INPUT /usr/share/texmf/tex/latex/lm/lmodern.sty
+INPUT /usr/share/texmf/tex/latex/graphics/graphicx.sty
+INPUT /usr/share/texmf/tex/latex/graphics/graphicx.sty
+INPUT /usr/share/texmf/tex/latex/graphics/keyval.sty
+INPUT /usr/share/texmf/tex/latex/graphics/keyval.sty
+INPUT /usr/share/texmf/tex/latex/graphics/graphics.sty
+INPUT /usr/share/texmf/tex/latex/graphics/graphics.sty
+INPUT /usr/share/texmf/tex/latex/graphics/trig.sty
+INPUT /usr/share/texmf/tex/latex/graphics/trig.sty
+INPUT /usr/share/texmf/tex/latex/latexconfig/graphics.cfg
+INPUT /usr/share/texmf/tex/latex/latexconfig/graphics.cfg
+INPUT /usr/share/texmf/tex/latex/pdftex-def/pdftex.def
+INPUT /usr/share/texmf/tex/latex/pdftex-def/pdftex.def
+INPUT /usr/share/texmf/tex/generic/oberdiek/infwarerr.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/infwarerr.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/ltxcmds.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/ltxcmds.sty
+INPUT /usr/share/texmf/tex/latex/tools/verbatim.sty
+INPUT /usr/share/texmf/tex/latex/tools/verbatim.sty
+INPUT /usr/share/texmf/tex/latex/base/fontenc.sty
+INPUT /usr/share/texmf/tex/latex/base/fontenc.sty
+INPUT /usr/share/texmf/tex/latex/base/t1enc.def
+INPUT /usr/share/texmf/tex/latex/base/t1enc.def
+INPUT /usr/share/texmf/tex/latex/listings/listings.sty
+INPUT /usr/share/texmf/tex/latex/listings/listings.sty
+INPUT /usr/share/texmf/tex/latex/listings/lstmisc.sty
+INPUT /usr/share/texmf/tex/latex/listings/lstmisc.sty
+INPUT /usr/share/texmf/tex/latex/listings/listings.cfg
+INPUT /usr/share/texmf/tex/latex/listings/listings.cfg
+INPUT /usr/share/texmf/tex/latex/xcolor/xcolor.sty
+INPUT /usr/share/texmf/tex/latex/xcolor/xcolor.sty
+INPUT /usr/share/texmf/tex/latex/latexconfig/color.cfg
+INPUT /usr/share/texmf/tex/latex/latexconfig/color.cfg
+INPUT uart.aux
+INPUT uart.aux
+OUTPUT uart.aux
+INPUT /usr/share/texmf/tex/latex/lm/t1lmr.fd
+INPUT /usr/share/texmf/tex/latex/lm/t1lmr.fd
+INPUT /usr/share/texmf/fonts/tfm/public/lm/ec-lmr10.tfm
+INPUT /usr/share/texmf/tex/context/base/supp-pdf.mkii
+INPUT /usr/share/texmf/tex/context/base/supp-pdf.mkii
+INPUT /usr/share/texmf/tex/generic/oberdiek/pdftexcmds.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/pdftexcmds.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/ifluatex.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/ifluatex.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/ifpdf.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/ifpdf.sty
+INPUT /usr/share/texmf/tex/latex/oberdiek/epstopdf-base.sty
+INPUT /usr/share/texmf/tex/latex/oberdiek/epstopdf-base.sty
+INPUT /usr/share/texmf/tex/latex/oberdiek/grfext.sty
+INPUT /usr/share/texmf/tex/latex/oberdiek/grfext.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/kvdefinekeys.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/kvdefinekeys.sty
+INPUT /usr/share/texmf/tex/latex/oberdiek/kvoptions.sty
+INPUT /usr/share/texmf/tex/latex/oberdiek/kvoptions.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/kvsetkeys.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/kvsetkeys.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/etexcmds.sty
+INPUT /usr/share/texmf/tex/generic/oberdiek/etexcmds.sty
+INPUT /usr/share/texmf/tex/latex/latexconfig/epstopdf-sys.cfg
+INPUT /usr/share/texmf/tex/latex/latexconfig/epstopdf-sys.cfg
+INPUT /usr/share/texmf/fonts/tfm/public/lm/ec-lmr17.tfm
+INPUT /usr/share/texmf/fonts/tfm/public/lm/ec-lmr12.tfm
+INPUT /usr/share/texmf/tex/latex/lm/ot1lmr.fd
+INPUT /usr/share/texmf/tex/latex/lm/ot1lmr.fd
+INPUT /usr/share/texmf/fonts/tfm/public/lm/rm-lmr12.tfm
+INPUT /usr/share/texmf/fonts/tfm/public/lm/rm-lmr8.tfm
+INPUT /usr/share/texmf/fonts/tfm/public/lm/rm-lmr6.tfm
+INPUT /usr/share/texmf/tex/latex/lm/omllmm.fd
+INPUT /usr/share/texmf/tex/latex/lm/omllmm.fd
+INPUT /usr/share/texmf/fonts/tfm/public/lm/lmmi12.tfm
+INPUT /usr/share/texmf/fonts/tfm/public/lm/lmmi8.tfm
+INPUT /usr/share/texmf/fonts/tfm/public/lm/lmmi6.tfm
+INPUT /usr/share/texmf/tex/latex/lm/omslmsy.fd
+INPUT /usr/share/texmf/tex/latex/lm/omslmsy.fd
+INPUT /usr/share/texmf/fonts/tfm/public/lm/lmsy10.tfm
+INPUT /usr/share/texmf/fonts/tfm/public/lm/lmsy8.tfm
+INPUT /usr/share/texmf/fonts/tfm/public/lm/lmsy6.tfm
+INPUT /usr/share/texmf/tex/latex/lm/omxlmex.fd
+INPUT /usr/share/texmf/tex/latex/lm/omxlmex.fd
+INPUT /usr/share/texmf/fonts/tfm/public/lm/lmex10.tfm
+INPUT /usr/share/texmf/fonts/tfm/public/lm/ec-lmr12.tfm
+INPUT /usr/share/texmf/fonts/tfm/public/lm/ec-lmbx12.tfm
+INPUT uart.toc
+INPUT uart.toc
+INPUT /usr/share/texmf/fonts/tfm/public/lm/ec-lmbx10.tfm
+OUTPUT uart.toc
+INPUT /usr/share/texmf/fonts/tfm/public/lm/ec-lmr10.tfm
+INPUT /usr/share/texmf/fonts/tfm/public/lm/ec-lmbx10.tfm
+INPUT UART_timing.png
+INPUT ./UART_timing.png
+OUTPUT uart.pdf
+INPUT ./UART_timing.png
+INPUT tx/UART_TX_8N1.vhd
+INPUT /usr/share/texmf/tex/latex/lm/t1lmtt.fd
+INPUT /usr/share/texmf/tex/latex/lm/t1lmtt.fd
+INPUT /usr/share/texmf/fonts/tfm/public/lm/ec-lmtt10.tfm
+INPUT /usr/share/texmf/fonts/tfm/public/lm/ec-lmtt8.tfm
+INPUT tx/UART_TX_8N1.vhd
+INPUT tx/UART_TX_8N1.vhd
+INPUT /usr/share/texmf/fonts/tfm/public/lm/ec-lmtk10.tfm
+INPUT /usr/share/texmf/fonts/tfm/public/lm/ec-lmr8.tfm
+INPUT /usr/share/texmf/fonts/map/pdftex/updmap/pdftex.map
+INPUT uart.aux
+INPUT /usr/share/texmf/fonts/enc/dvips/lm/lm-ec.enc
+INPUT /usr/share/texmf/fonts/type1/public/lm/lmbx10.pfb
+INPUT /usr/share/texmf/fonts/type1/public/lm/lmbx12.pfb
+INPUT /usr/share/texmf/fonts/type1/public/lm/lmr10.pfb
+INPUT /usr/share/texmf/fonts/type1/public/lm/lmr12.pfb
+INPUT /usr/share/texmf/fonts/type1/public/lm/lmr17.pfb
+INPUT /usr/share/texmf/fonts/type1/public/lm/lmtk10.pfb
+INPUT /usr/share/texmf/fonts/type1/public/lm/lmtt8.pfb
diff --git a/doc/using/UART_srcs/uart.out b/doc/using/UART_srcs/uart.out
new file mode 100644
index 000000000..79ed1c00f
--- /dev/null
+++ b/doc/using/UART_srcs/uart.out
@@ -0,0 +1,8 @@
+\BOOKMARK [1][-]{section.1}{introduction UART transmission}{}% 1
+\BOOKMARK [1][-]{section.2}{advanced TX Unit with FIFO}{}% 2
+\BOOKMARK [1][-]{section.3}{advanced RX Unit with FIFO}{}% 3
+\BOOKMARK [1][-]{section.4}{example application}{}% 4
+\BOOKMARK [1][-]{section.5}{Makefile for workflow}{}% 5
+\BOOKMARK [1][-]{section.6}{file in/out}{}% 6
+\BOOKMARK [1][-]{section.7}{VHPI Interface to an other language}{}% 7
+\BOOKMARK [1][-]{section.8}{closing words}{}% 8
diff --git a/doc/using/UART_srcs/uart.tex b/doc/using/UART_srcs/uart.tex
new file mode 100644
index 000000000..1c1f21e20
--- /dev/null
+++ b/doc/using/UART_srcs/uart.tex
@@ -0,0 +1,269 @@
+\documentclass[a4paper,11pt]{article}
+\usepackage[T1]{fontenc}
+\usepackage[utf8]{inputenc}
+\usepackage{lmodern}
+%\usepackage{ngerman}
+\usepackage{graphicx}
+\usepackage{float}
+\usepackage{attachfile}
+\usepackage[T1]{fontenc}
+%\usepackage{beramono}% monospaced font with bold variant
+
+\usepackage{listings}
+\lstdefinelanguage{VHDL}{
+ morekeywords={
+ library,use,all,entity,is,port,in,out,end,architecture,of,
+ begin,and,generic,process,if,then,elsif,else,when,
+ signal, integer,std_logic,unsigned,signed,std_logic_vector,
+ constant, variable, wait, for, until, map
+ },
+ morecomment=[l]--
+}
+
+\usepackage{xcolor}
+\colorlet{keyword}{blue!100!black!80}
+\colorlet{comment}{green!90!black!90}
+\lstdefinestyle{vhdl}{
+ language = VHDL,
+ basicstyle = \ttfamily\scriptsize,
+ keywordstyle = \color{keyword}\bfseries,
+ commentstyle = \color{comment}
+}
+
+\lstdefinestyle{c}{
+ language = c,
+ basicstyle = \ttfamily\scriptsize,
+ keywordstyle = \color{keyword}\bfseries,
+ commentstyle = \color{comment}
+}
+
+\usepackage{hyperref} %remove the red boxes at contents
+\hypersetup{colorlinks=true,linkcolor=black}
+
+\usepackage{fancyvrb}
+
+\setlength{\parindent}{0em}
+
+
+\title{How to simulate an UART VHDL code with ghdl}
+\author{René Doß \\ info@dossmatik.de}
+
+\begin{document}
+
+\maketitle
+\tableofcontents
+
+\begin{abstract}
+This article was written to demonstrate on a practical example how ghdl works. The reader should have basic knowledge about VHDL. This example is fitable code into a FPGA. The code is written vendor independent. UART as example is generally understandable and also parctical on many applications.
+An asynchronous serial transmission has two parts Receiver and Transmitter. The handling is typical integrated on all microcontrollers today. Different sensors can communicate over UART. This makes this data transmission very interesting for a hardware developer. The Receiver and Transmitter code is included with an integrated FIFO. These all are demonstrated with ghdl simulation. You will get new spirit for VHDL code validation. The VHDL files are attached in this document.
+\end{abstract}
+
+\newpage
+\section{introduction UART transmission}
+The signal is at silence condition high. A low on line manifests a start of transmission, followed by a number of data bits. The data bits are send from least significant bit (LSB) to most significant bit (MSB). Next bit is a high, witch is called stop bit and it is needed to mark the end of transmission. In this state a new start bit can be correct capture by the receiver. Note that no clock signal has sent through the serial line. The transmitter resynchronize on the falling edge in start bit condition. The data speed and the data length of sender an receiver have to be the same.
+\begin{figure}[H]
+ \begin{center}
+ \includegraphics[scale=0.5]{UART_timing.png}
+ \caption{UART Timing}
+ \label{fig:UART Timing}
+ \end{center}
+\end{figure}
+
+The baudrate specifies the transmission speed. The unit is baud bit per second. Common baudrates are established.
+Internally the hardware of UART runs in higher clock rate.
+
+\section{advanced TX Unit with FIFO}
+The UART interface is slow and needs a buffer for better synchronisation. Data is written in a FIFO. FIFO is the abrivation first in first out. This FIFO is realised in a ring buffer. Figure \ref{fig:FIFO pointer} explains how it works. Two pointers point at an address of internal RAM. The pointer nextwrite points to the address where the next incoming data will be written. When new data is incoming the FIFO the pointer is increased. Now valid data has to be read from the FIFO and the nextread is increased. If the two pointers in the FIFO are equal the FIFO is empty.
+
+\begin{figure}[H]
+ \begin{center}
+ \includegraphics[scale=0.5]{tx/BlockTX.png}
+ \caption{Blockdiagram TX}
+ \label{fig:Blockdiagram}
+ \end{center}
+\end{figure}
+\hrule
+\lstinputlisting[style=vhdl]{tx/UART_TX_8N1.vhd}
+\hrule
+\vspace{10pt}
+\begin{figure}[H]
+ \begin{center}
+ \includegraphics[scale=0.4]{tx/path6054.png}
+ \caption{FIFO pointer}
+ \label{fig:FIFO pointer}
+ \end{center}
+\end{figure}
+ The FIFO is a circular buffer and works with two address pointers. One pointer is used to point at the write address. The other pointer points at the read address. Both pointers are increased with one step. The interface has two control signals for handshakes. send\_busy and send\_empty these are the FIFO states full and empty. The distance between nextwrite and nextread generates the signal busy because even one more wirte action would cause an overflow in the buffer.
+ The testbench is required.
+\\
+\hrule
+\lstinputlisting[style=vhdl]{tx/tb_UART_TX_8N1.vhd}
+\hrule
+\vspace{10pt}
+Put both files in the same directory and simulate this testcase and check the timing requirements.
+
+\begin{verbatim}
+ghdl -i *.vhd
+ghdl -m tb_UART_TX_8N1
+ghdl -r tb_UART_TX_8N1 --stop-time=200us --wave=TX.ghw
+gtkwave TX.ghw
+\end{verbatim}
+
+\begin{figure}[H]
+ \begin{center}
+ \includegraphics[scale=0.3]{tx/TX_simple.png}
+ \caption{UART TX output}
+ \end{center}
+\end{figure}
+
+\section{advanced RX Unit with FIFO}
+The receiver is the opposite component of the transmitter. The code is mapped also in this article. The generic is used to set the right timing. The tick\_counter is the timer of one bit. The counter range of tick is calculated by the generic clk\_freq and baudrate. These parameters make the code portable into different designs. There is nothing to change inside the code when another frequency or baudrate are used. Such parameter makes source code simpiler reusable. When the transmission is off, the RX has a high on line. The state maschine is in idle and waits for RX to turn low. This condition is checked of the falling edge on the start bit. All other bits are cought in the middle of the bit time.
+\\
+\hrule
+\lstinputlisting[style=vhdl]{rx/UART_RX_8N1.vhd}
+\hrule
+\vspace{10pt}
+Now the apposite testbench.
+\hrule
+\lstinputlisting[style=vhdl]{rx/tb_UART_RX_8N1.vhd}
+\hrule
+\vspace{10pt}
+
+\begin{verbatim}
+ghdl -i *.vhd
+ghdl -m tb_UART_RX_8N1
+ghdl -r tb_UART_RX_8N1 --stop-time=800us --wave=RX.ghw
+gtkwave RX.ghw
+\end{verbatim}
+
+\begin{figure}[H]
+ \begin{center}
+ \includegraphics[scale=0.3]{rx/sim_RX.png}
+ \caption{UART RX in}
+ \label{fig:sim RX}
+ \end{center}
+\end{figure}
+
+\section{example application}
+In the last sections we have designed an input and an output interface. By combinating the receiving and transmitting example, we can build the full UART. Now let us make a simple capitalisation ASCII engine. This is more a theoretical example for a demonstration. The data stream is very simple. It demonstrates how it works.
+\\
+\hrule
+\lstinputlisting[style=vhdl]{capitalisation/capitalisation.vhd}
+\hrule
+\vspace{10pt}
+
+The application has an 8bit input and a 8bit output interface. A top instance combine the application and the RX und TX interface together. RX and TX are the physical wires and board\_clk is the internal clock of all. This design is competent to fit inside an FPGA.
+\begin{figure}[H]
+ \begin{center}
+ \includegraphics[scale=0.4]{capitalisation/zeichnung.png}
+ \end{center}
+\end{figure}
+
+\hrule
+\lstinputlisting[style=vhdl]{capitalisation/top_capitalisation.vhd}
+\hrule
+\vspace{10pt}
+Also for this the testbench.
+\\
+\hrule
+\lstinputlisting[style=vhdl]{capitalisation/tb_capitalisation.vhd}
+\hrule
+\vspace{10pt}
+
+\begin{figure}[H]
+ \begin{center}
+ \includegraphics[scale=0.4]{capitalisation/capitalisation.png}
+ \caption{capitalisation}
+ \label{fig:capitalisation}
+ \end{center}
+\end{figure}
+
+\section{Makefile for workflow}
+Make is a build tool from the GNU Project. Mostly it is used to control compiling a huge number of files ans solve dependencies. For simplify your life and enhance your productivity you can use is also the make tool to prepair the target in the ghdl simulation. The makefile is like a script with sequential commands. Sometimes rules are insert. If you have larger designs, you should also divide the VHDL design into different files. I use \textbf{make} for this. Store the makefile into the same folder. For run in GHDL type make, this starts all commandos under all. And for view inside the timingdiagram type \textbf{make view}. You find many examples but I give you my makefile for a simple start in GHDL application.
+\\
+\hrule
+\VerbatimInput{capitalisation/makefile}
+\hrule
+\vspace{10pt}
+
+
+\section{file in/out}
+In former section we had simulate the whole desgin. In larger designs this can be difficult. It needs time to run and it can be also possible some parts are not read. You have to divide the design in moduls and you have to test the moduls by itselfs. Tested moduls can be integated inside the design. The simple 8bit interface is an good standard. Now I show you. How a module can be tested with datas from an file and also put the output into a file. Sometimes is this simpiler to check as a view in a timing diagram.
+\begin{figure}[H]
+ \begin{center}
+ \includegraphics[scale=0.4]{file_in_out/zeichnung.png}
+ \end{center}
+\end{figure}
+The file \textbf{test.txt} is read and the characters goes into the capitalisation and are written in the file \textbf{text1.txt}.
+
+\vspace{10pt}
+\\
+\hrule
+\lstinputlisting[style=vhdl]{file_in_out/tb_file.vhd}
+\hrule
+\vspace{10pt}
+
+\begin{verbatim}
+[test.txt]
+Hallo world! Can you see my text?
+\end{verbatim}
+
+\begin{verbatim}
+[test1.txt]
+HALLO WORLD! CAN YOU SEE MY TEXT?
+\end{verbatim}
+VHDL has only restricted file operations. It is not possible to seek the fileposition.
+
+\section{VHPI Interface to an other language}
+Here I show one of the highest feature of GHDL. It is possible to link code from another language into the simulation. This can be used for a model or an interface to a real hardware. The possible speed is lower as in an FPGA. For testing is this a change to use mor realistic posibilities. You can data interchange of other programs, for instance testing software. In our case the simulation can communicate with a comport emulator. Linux has pseudoterminals witch is a serial interface in driver lowlever exchange of programs.
+First start the c source file. There are only some c functions.
+\begin{figure}[H]
+ \begin{center}
+ \includegraphics[scale=0.4]{vhpi/zeichnung.png}
+ \end{center}
+\end{figure}
+\vspace{10pt}
+\\
+\hrule
+\lstinputlisting[style=c]{vhpi/tty.c}
+\hrule
+\vspace{10pt}
+
+This package is the glue between external code. All c functions get a wrap of a vhdl definition. That makes possible to call a c function in vhdl. This is the advantage of this VHPI interface.
+\vspace{10pt}
+\hrule
+\lstinputlisting[style=vhdl]{vhpi/tty_pkg.vhd}
+\hrule
+\vspace{10pt}
+Also for that case the testbench.
+\vspace{10pt}
+\\
+\hrule
+\lstinputlisting[style=vhdl]{vhpi/tb_tty.vhd}
+\hrule
+\vspace{10pt}
+And the makefile that you can compile and link all together.
+\hrule
+\VerbatimInput{vhpi/makefile}
+\hrule
+\vspace{10pt}
+In action the simulation prints out the name of the pseudotherminal. I can open a serial terminal program and send datas to the simulation and can also receive the output.
+
+\begin{figure}[H]
+ \begin{center}
+ \includegraphics[scale=0.5]{vhpi/terminal.png}
+ \end{center}
+\end{figure}
+
+\section{closing words}
+ The chapter of testbench is very short in the most books. In this article you see the code for testing is adequate to code of application. A simulation is irrecoverable for good results. The development is only effective with simulation. Debug at a later development phase is very difficult. The testbench is the pusher for all effects. The code should also be reusable code. The generic is an interface to set some parameter for a simpler practical integration in the whole application. I hope you could follow all demonstrations and give you idea for better work.
+
+ \begin{verbatim}
+ the procedure tx_char was posted of Lothar Miller on
+ http:\\www.mikrocontroller.net
+
+ the VHPI interface for pseudotherminal was posted
+ of Wojciech M. Zabolotny on comp.arch.FPGA 2011
+ \end{verbatim}
+
+\end{document}
diff --git a/doc/using/UART_srcs/uart.toc b/doc/using/UART_srcs/uart.toc
new file mode 100644
index 000000000..348a47af4
--- /dev/null
+++ b/doc/using/UART_srcs/uart.toc
@@ -0,0 +1,8 @@
+\contentsline {section}{\numberline {1}introduction UART transmission}{2}{section.1}
+\contentsline {section}{\numberline {2}advanced TX Unit with FIFO}{2}{section.2}
+\contentsline {section}{\numberline {3}advanced RX Unit with FIFO}{8}{section.3}
+\contentsline {section}{\numberline {4}example application}{13}{section.4}
+\contentsline {section}{\numberline {5}Makefile for workflow}{19}{section.5}
+\contentsline {section}{\numberline {6}file in/out}{19}{section.6}
+\contentsline {section}{\numberline {7}VHPI Interface to an other language}{22}{section.7}
+\contentsline {section}{\numberline {8}closing words}{28}{section.8}
diff --git a/doc/using/UART_srcs/vhpi/Zeichnung.svg b/doc/using/UART_srcs/vhpi/Zeichnung.svg
new file mode 100644
index 000000000..f984c727b
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+++ b/doc/using/UART_srcs/vhpi/Zeichnung.svg
@@ -0,0 +1,424 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!-- Created with Inkscape (http://www.inkscape.org/) -->
+
+<svg
+ xmlns:dc="http://purl.org/dc/elements/1.1/"
+ xmlns:cc="http://creativecommons.org/ns#"
+ xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
+ xmlns:svg="http://www.w3.org/2000/svg"
+ xmlns="http://www.w3.org/2000/svg"
+ xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
+ xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
+ width="297mm"
+ height="210mm"
+ viewBox="0 0 1052.3622 744.09448"
+ id="svg2"
+ version="1.1"
+ inkscape:version="0.91 r13725"
+ sodipodi:docname="Zeichnung.svg"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/zeichnung.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90">
+ <defs
+ id="defs4">
+ <marker
+ inkscape:stockid="Arrow1Lend"
+ orient="auto"
+ refY="0.0"
+ refX="0.0"
+ id="Arrow1Lend"
+ style="overflow:visible;"
+ inkscape:isstock="true">
+ <path
+ id="path4245"
+ d="M 0.0,0.0 L 5.0,-5.0 L -12.5,0.0 L 5.0,5.0 L 0.0,0.0 z "
+ style="fill-rule:evenodd;stroke:#000000;stroke-width:1.0pt;"
+ transform="scale(0.8) rotate(180) translate(12.5,0)" />
+ </marker>
+ <marker
+ inkscape:stockid="Arrow1Lend"
+ orient="auto"
+ refY="0.0"
+ refX="0.0"
+ id="marker5517"
+ style="overflow:visible;"
+ inkscape:isstock="true">
+ <path
+ id="path5519"
+ d="M 0.0,0.0 L 5.0,-5.0 L -12.5,0.0 L 5.0,5.0 L 0.0,0.0 z "
+ style="fill-rule:evenodd;stroke:#000000;stroke-width:1pt;stroke-opacity:1;fill:#000000;fill-opacity:1"
+ transform="scale(0.8) rotate(180) translate(12.5,0)" />
+ </marker>
+ </defs>
+ <sodipodi:namedview
+ id="base"
+ pagecolor="#ffffff"
+ bordercolor="#666666"
+ borderopacity="1.0"
+ inkscape:pageopacity="0.0"
+ inkscape:pageshadow="2"
+ inkscape:zoom="0.98994949"
+ inkscape:cx="490.27074"
+ inkscape:cy="477.90138"
+ inkscape:document-units="px"
+ inkscape:current-layer="layer1"
+ showgrid="false"
+ inkscape:window-width="1920"
+ inkscape:window-height="1016"
+ inkscape:window-x="0"
+ inkscape:window-y="27"
+ inkscape:window-maximized="1" />
+ <metadata
+ id="metadata7">
+ <rdf:RDF>
+ <cc:Work
+ rdf:about="">
+ <dc:format>image/svg+xml</dc:format>
+ <dc:type
+ rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
+ <dc:title></dc:title>
+ </cc:Work>
+ </rdf:RDF>
+ </metadata>
+ <g
+ inkscape:label="Ebene 1"
+ inkscape:groupmode="layer"
+ id="layer1"
+ transform="translate(0,-308.26772)">
+ <rect
+ style="opacity:1;fill:#e6e6e6;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ id="rect4590"
+ width="700.03564"
+ height="360.62445"
+ x="34.654861"
+ y="362.42804"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png" />
+ <rect
+ y="478.54639"
+ x="260.19949"
+ height="214.28572"
+ width="252.68301"
+ id="rect4154"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="313.14285"
+ y="623.79077"
+ id="text4136"
+ sodipodi:linespacing="125%"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ sodipodi:role="line"
+ id="tspan4138"
+ x="313.14285"
+ y="623.79077">capitalisation</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="113.99998"
+ y="645.79077"
+ id="text4140"
+ sodipodi:linespacing="125%"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ sodipodi:role="line"
+ id="tspan4142"
+ x="113.99998"
+ y="645.79077">c function</tspan><tspan
+ sodipodi:role="line"
+ x="113.99998"
+ y="677.04077"
+ id="tspan4530">read_data</tspan></text>
+ <rect
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:1.99999988;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ id="rect4148"
+ width="156.59319"
+ height="70"
+ x="98.549683"
+ y="615.50507"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90" />
+ <rect
+ y="579.50507"
+ x="296.28574"
+ height="70"
+ width="182.85715"
+ id="rect4150"
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90" />
+ <rect
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ id="rect4152"
+ width="182.85715"
+ height="70"
+ x="520.28577"
+ y="579.50507"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="390.94702"
+ y="512.03662"
+ id="text4168"
+ sodipodi:linespacing="125%"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ sodipodi:role="line"
+ id="tspan4170"
+ x="390.94702"
+ y="512.03662">tb_tty.vhd</tspan></text>
+ <path
+ inkscape:connector-curvature="0"
+ id="path4172"
+ d="m 255.57141,626.64789 40.35714,0"
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90" />
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="m 479.57141,626.64789 40.35714,0"
+ id="path4174"
+ inkscape:connector-curvature="0"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:17.1706295px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="-789.13831"
+ y="242.90793"
+ id="text4490"
+ sodipodi:linespacing="125%"
+ transform="matrix(0,-0.86921859,1.1504586,0,0,0)"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ sodipodi:role="line"
+ id="tspan4492"
+ x="-789.13831"
+ y="242.90793">8bit parallel</tspan></text>
+ <text
+ transform="matrix(0,-0.86921859,1.1504586,0,0,0)"
+ sodipodi:linespacing="125%"
+ id="text4494"
+ y="440.23749"
+ x="-709.15009"
+ style="font-style:normal;font-weight:normal;font-size:17.1706295px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ y="440.23749"
+ x="-709.15009"
+ id="tspan4496"
+ sodipodi:role="line">8bit parallel</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="286.33514"
+ y="505.65875"
+ id="text4517"
+ sodipodi:linespacing="125%"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ sodipodi:role="line"
+ id="tspan4519"
+ x="286.33514"
+ y="505.65875">clk</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="279.11826"
+ y="531.00616"
+ id="text4521"
+ sodipodi:linespacing="125%"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ sodipodi:role="line"
+ id="tspan4523"
+ x="279.11826"
+ y="531.00616">reset</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="547.81238"
+ y="610.96613"
+ id="text4524"
+ sodipodi:linespacing="125%"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ sodipodi:role="line"
+ id="tspan4526"
+ x="547.81238"
+ y="610.96613">c function</tspan><tspan
+ sodipodi:role="line"
+ x="547.81238"
+ y="642.21613"
+ id="tspan4528">write_data</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="651.70575"
+ y="405.86456"
+ id="text4592"
+ sodipodi:linespacing="125%"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ sodipodi:role="line"
+ id="tspan4594"
+ x="651.70575"
+ y="405.86456">tty.c</tspan></text>
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="106.25388"
+ y="546.13361"
+ id="text4598"
+ sodipodi:linespacing="125%"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ sodipodi:role="line"
+ id="tspan4600"
+ x="106.25388"
+ y="546.13361">c function</tspan><tspan
+ sodipodi:role="line"
+ x="106.25388"
+ y="577.38361"
+ id="tspan4602">read_enable</tspan></text>
+ <rect
+ y="523.50507"
+ x="98.549683"
+ height="70"
+ width="156.59319"
+ id="rect4604"
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:1.99999988;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90" />
+ <text
+ sodipodi:linespacing="125%"
+ id="text4606"
+ y="410.8595"
+ x="108.23357"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ y="410.8595"
+ x="108.23357"
+ id="tspan4608"
+ sodipodi:role="line">c function</tspan><tspan
+ id="tspan4610"
+ y="442.1095"
+ x="108.23357"
+ sodipodi:role="line">tty_open</tspan></text>
+ <rect
+ style="opacity:1;fill:none;fill-opacity:1;stroke:#000000;stroke-width:1.99999988;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ id="rect4612"
+ width="156.59319"
+ height="70"
+ x="98.549683"
+ y="383.50507"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90" />
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="m 255.57141,586.64789 40.35714,0"
+ id="path4614"
+ inkscape:connector-curvature="0"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90" />
+ <text
+ transform="matrix(0,-0.86921859,1.1504586,0,0,0)"
+ sodipodi:linespacing="125%"
+ id="text4616"
+ y="242.90793"
+ x="-667.19043"
+ style="font-style:normal;font-weight:normal;font-size:17.1706295px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ y="242.90793"
+ x="-667.19043"
+ id="tspan4618"
+ sodipodi:role="line">rd_en</tspan></text>
+ <rect
+ style="opacity:1;fill:#ffffff;fill-opacity:1;stroke:#000000;stroke-width:2;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1"
+ id="rect4639"
+ width="168.69548"
+ height="134.3503"
+ x="855.59918"
+ y="397.78336"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="876.81244"
+ y="422.02701"
+ id="text4641"
+ sodipodi:linespacing="125%"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ sodipodi:role="line"
+ id="tspan4643"
+ x="876.81244"
+ y="422.02701">terminal</tspan></text>
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:2;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;stroke-miterlimit:4;stroke-dasharray:none"
+ d="m 854.58906,427.07778 c 169.70564,0 169.70564,0 169.70564,0"
+ id="path4645"
+ inkscape:connector-curvature="0"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90" />
+ <text
+ xml:space="preserve"
+ style="font-style:normal;font-weight:normal;font-size:25px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ x="865.70074"
+ y="457.38235"
+ id="text4647"
+ sodipodi:linespacing="125%"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90"><tspan
+ sodipodi:role="line"
+ id="tspan4649"
+ x="865.70074"
+ y="457.38235">$&gt;</tspan></text>
+ <path
+ style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="m 735.39106,449.30114 c 0,-1.68359 0,-3.36718 0,-5.05077 0,-0.33671 -0.15059,-0.70898 0,-1.01015 0.21295,-0.42592 0.79719,-0.58423 1.01015,-1.01015 0.15058,-0.30117 -0.15059,-0.70898 0,-1.01015 0.21296,-0.42592 0.79719,-0.58424 1.01015,-1.01016 0.15058,-0.30117 -0.15058,-0.70898 0,-1.01015 0.42592,-0.85183 1.59439,-1.16847 2.02031,-2.0203 0.30116,-0.60234 -0.4762,-1.54412 0,-2.02031 2.09004,-2.09004 -0.0817,3.19386 2.0203,-1.01015 0.30117,-0.60234 -0.47619,-1.54412 0,-2.02031 0.2381,-0.23809 0.77206,0.2381 1.01015,0 0.47619,-0.47619 -0.47619,-1.54411 0,-2.0203 0.2381,-0.2381 0.70899,0.15058 1.01016,0 0.42591,-0.21296 0.67343,-0.67344 1.01015,-1.01015 0.33672,-0.33672 0.79719,-0.58424 1.01015,-1.01016 0.15059,-0.30117 -0.15058,-0.70898 0,-1.01015 0.21296,-0.42592 0.67344,-0.67343 1.01015,-1.01015 0.33672,-0.33672 0.58424,-0.7972 1.01016,-1.01015 0.60233,-0.30117 1.54411,0.47619 2.0203,0 0.2381,-0.2381 -0.23809,-0.77206 0,-1.01016 0.2381,-0.23809 0.70898,0.15059 1.01015,0 0.42592,-0.21296 0.58424,-0.79719 1.01016,-1.01015 0.30117,-0.15058 0.77205,0.2381 1.01015,0 0.23809,-0.23809 -0.2381,-0.77206 0,-1.01015 0.23809,-0.2381 0.70898,0.15058 1.01015,0 0.85184,-0.42592 1.16847,-1.59439 2.02031,-2.02031 0.30117,-0.15058 0.70898,0.15059 1.01015,0 0.42592,-0.21296 0.58423,-0.79719 1.01015,-1.01015 0.30742,-0.15371 2.57553,0 3.03046,0 0.52823,0 3.775,-0.13281 4.04061,0 0.42592,0.21296 0.58423,0.79719 1.01015,1.01015 1.07979,0.5399 0.94052,-0.53989 2.02031,0 0.42591,0.21296 0.58423,0.7972 1.01015,1.01016 0.30117,0.15058 0.70898,-0.15059 1.01015,0 0.42592,0.21295 0.58424,0.79719 1.01015,1.01015 0.30117,0.15058 0.70899,-0.15059 1.01016,0 0.99402,0.49701 3.04659,3.5436 4.04061,4.04061 0.60234,0.30117 1.41796,-0.30117 2.0203,0 4.20402,2.102 -1.07989,-0.0697 1.01015,2.0203 0.2381,0.2381 0.70899,-0.15058 1.01016,0 0.19336,0.0967 3.94393,3.84725 4.04061,4.04061 0.15058,0.30117 -0.2381,0.77206 0,1.01016 0.23809,0.23809 0.70898,-0.15059 1.01015,0 1.21218,0.60609 1.81827,2.42436 3.03046,3.03045 0.30117,0.15059 0.70898,-0.15058 1.01015,0 4.20401,2.10201 -1.07989,-0.0697 1.01015,2.02031 0.2381,0.23809 0.70899,-0.15059 1.01016,0 0.42591,0.21296 0.58423,0.79719 1.01015,1.01015 0.30117,0.15059 0.70898,-0.15058 1.01015,0 1.21218,0.60609 1.81827,2.42437 3.03046,3.03046 0.60234,0.30117 1.54411,-0.47619 2.0203,0 0.2381,0.23809 -0.23809,0.77206 0,1.01015 0.47619,0.47619 1.54412,-0.47619 2.02031,0 0.23809,0.2381 -0.2381,0.77206 0,1.01015 0.23809,0.2381 0.70898,-0.15058 1.01015,0 0.42592,0.21296 0.58424,0.7972 1.01015,1.01016 0.30117,0.15058 0.70899,-0.15059 1.01016,0 0.42591,0.21296 0.58423,0.79719 1.01015,1.01015 0.60234,0.30117 1.41796,-0.30117 2.0203,0 0.42592,0.21296 0.58424,0.79719 1.01016,1.01015 0.6349,0.31745 3.4057,-0.31745 4.04061,0 0.42591,0.21296 0.58423,0.7972 1.01015,1.01015 0.30117,0.15059 0.67343,0 1.01015,0 2.02031,0 4.04061,0 6.06092,0 0.33671,0 0.77205,0.2381 1.01015,0 0.23809,-0.23809 -0.2381,-0.77205 0,-1.01015 0.23809,-0.23809 0.67343,0 1.01015,0 0.33672,0 0.67344,0 1.01015,0 0.716,0 5.79974,0.13059 6.06092,0 0.42592,-0.21296 0.58423,-0.79719 1.01015,-1.01015 0.36531,-0.18265 4.34816,0 5.05076,0 0.70261,0 4.68546,-0.18265 5.05077,0 0.42592,0.21296 0.58423,0.79719 1.01015,1.01015 0.30117,0.15059 0.67344,0 1.01015,0 0.33672,0 0.67344,0 1.01016,0 1.68358,0 3.36717,0 5.05076,0 0.33672,0 0.70898,-0.15058 1.01015,0 3.35025,3.35026 -0.95238,-0.47619 2.02031,1.01015 0.42591,0.21296 0.58423,0.7972 1.01015,1.01016 0.60234,0.30117 1.54411,-0.47619 2.0203,0 0.2381,0.23809 -0.23809,0.77205 0,1.01015 0.2381,0.23809 0.67344,0 1.01016,0 0.33671,0 0.67343,0 1.01015,0"
+ id="path4651"
+ inkscape:connector-curvature="0"
+ inkscape:export-filename="/home/red/artikel_uart/capitalisation/rect4590.png"
+ inkscape:export-xdpi="90"
+ inkscape:export-ydpi="90" />
+ </g>
+</svg>
diff --git a/doc/using/UART_srcs/vhpi/makefile b/doc/using/UART_srcs/vhpi/makefile
new file mode 100644
index 000000000..fdf5bc3b0
--- /dev/null
+++ b/doc/using/UART_srcs/vhpi/makefile
@@ -0,0 +1,22 @@
+
+
+
+all:
+
+ rm -rf work
+ mkdir work
+
+ ghdl -a --work=work --workdir=work tty_pkg.vhd
+ gcc -c -fPIC tty.c -o tty.o
+
+ ghdl -a --work=work --workdir=work ../capitalisation/capitalisation.vhd
+ ghdl -a --work=work --workdir=work tb_tty.vhd
+
+ ghdl -e -Wl,tty.o --ieee=synopsys -fexplicit --workdir=work -Pwork tb_tty
+# ghdl -r tb_tty --wave=tbench.ghw
+ ghdl -r tb_tty --wave=tbench.ghw --stop-time=500000us
+
+
+view:
+ gtkwave tbench.ghw a.gtkw
+
diff --git a/doc/using/UART_srcs/vhpi/tb_tty.vhd b/doc/using/UART_srcs/vhpi/tb_tty.vhd
new file mode 100644
index 000000000..6e1576ed5
--- /dev/null
+++ b/doc/using/UART_srcs/vhpi/tb_tty.vhd
@@ -0,0 +1,116 @@
+--tb_tty.vhd
+LIBRARY ieee;
+USE ieee.std_logic_1164.ALL;
+USE ieee.numeric_std.ALL;
+use work.tty_pkg.all;
+
+ENTITY tb_tty IS
+END tb_tty;
+
+ARCHITECTURE behavior OF tb_tty IS
+
+signal clk : std_logic := '0';
+signal reset : std_logic;
+
+signal data_in : std_logic_vector(7 downto 0);
+signal wdata : std_logic_vector(7 downto 0);
+signal wr_en : std_logic:='1';
+signal wr : std_logic;
+signal rd_en : std_logic;
+signal rd : std_logic;
+signal a : integer;
+signal c : integer;
+
+
+component capitalisation is
+ port(
+ clk : in std_logic;
+ reset : in std_logic;
+ --in
+ rdata : in std_logic_vector(7 downto 0);
+ rd_en : in std_logic;
+ rd : out std_logic;
+ --out
+ wdata : out std_logic_vector(7 downto 0);
+ wr_en : in std_logic;
+ wr : out std_logic
+ );
+end component;
+
+ -- Clock period definitions
+ constant clk_period : time := 10 ns;
+
+subtype by_te is character;
+type f_byte is file of by_te;
+
+BEGIN
+
+--file open
+ process
+ begin c<=tty_open(0);
+ wait;
+ end process;
+
+--read
+process (clk)
+
+variable b: integer;
+begin
+ if rising_edge(CLK) then
+ a<= read_enable(0);
+ if a=1 then
+ data_in<=std_logic_vector(to_unsigned(read_data(0),8));
+ rd_en<='1';
+ else
+ rd_en<='0';
+ end if;
+ end if;
+
+end process;
+
+--write
+process (clk)
+variable b: integer;
+
+ begin
+ if rising_edge(CLK) then
+ if reset='0' then
+ if wr='1' then
+ b:=to_integer(unsigned(wdata));
+ write_data(b);
+ end if;
+ end if;
+ end if;
+ end process;
+
+ stim_proc : process
+ begin
+ reset <= '1';
+
+ wait for 50 ns;
+ reset <='0';
+ wait;
+ end process;
+
+ clk_process :process
+ begin
+ clk <= '0';
+ wait for clk_period/2;
+ clk <= '1';
+ wait for clk_period/2;
+ end process;
+
+engine: capitalisation
+ port map(
+ clk => clk,
+ reset => reset,
+ --in
+ rdata => data_in,
+ rd_en => rd_en,
+ rd => rd,
+ --out
+ wdata => wdata,
+ wr_en => wr_en,
+ wr => wr
+ );
+END;
diff --git a/doc/using/UART_srcs/vhpi/terminal.png b/doc/using/UART_srcs/vhpi/terminal.png
new file mode 100644
index 000000000..a19f3cd64
--- /dev/null
+++ b/doc/using/UART_srcs/vhpi/terminal.png
Binary files differ
diff --git a/doc/using/UART_srcs/vhpi/tty.c b/doc/using/UART_srcs/vhpi/tty.c
new file mode 100644
index 000000000..c04f8f359
--- /dev/null
+++ b/doc/using/UART_srcs/vhpi/tty.c
@@ -0,0 +1,83 @@
+/*
+ VPI code allowing you to connect terminal emulator or other program to pty "connected"
+ to the UART-like port in IP core simulated in GHDL.
+
+ This code is written by Wojciech M. Zabolotny (wz...@ise.pw.edu.pl) on 2nd June 2011
+ and is published as PUBLIC DOMAIN
+
+*/
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdarg.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <sys/ioctl.h>
+#include <linux/ioctl.h>
+#include <sys/stat.h>
+#include <sys/poll.h>
+#include <fcntl.h>
+#include <errno.h>
+
+char *ptsname(int fd);
+
+int ptyf = -1;
+
+
+
+int tty_open(int a)
+{
+ ptyf = open("/dev/ptmx",O_RDWR);
+ if(ptyf<0) {
+ perror("I can't open pseudoterminal\n");
+ return -1;
+ }
+ if(unlockpt(ptyf)<0) {
+ perror("I can't unlock pseudoterminal\n");
+ return -1;
+ }
+ if(grantpt(ptyf)<0) {
+ perror("I can't grant pseudoterminal\n");
+ return -1;
+ }
+ printf("Pseudoterminal: %s\n",ptsname(ptyf));
+ // sleep(10);
+ return 0;
+}
+
+
+int read_enable(void)
+{
+ //In the masks below you may omit POLLHUP in this case
+ //disconnection of the terminal emulator from pty will not
+ //stop simulation, and you'll be able to reconnect
+ //the same or different program to pty and running simulation
+ struct pollfd pfd[1]={{ptyf,POLLIN | POLLERR | POLLHUP,0}};
+ int res;
+ res=poll(pfd,1,0);
+ if(res==0) return 0;
+ if(res<0) return 0; //error
+ //If you removed POLLHUP from the mask above, you should remove it below too
+ if(pfd[0].revents & (POLLERR|POLLHUP)) return 0; //disconnected or error?
+ if(pfd[0].revents & POLLIN) return 1;
+ return 0;
+}
+
+
+int read_data(void)
+{
+ unsigned char c;
+ read(ptyf,&c,1);
+ return c;
+}
+
+int write_data(int byte)
+{
+ unsigned char c = byte;
+ write(ptyf,&c,1);
+
+ // Debug: printf("Writing %x to pty\n", c);
+ return 0;
+}
+
diff --git a/doc/using/UART_srcs/vhpi/tty_pkg.vhd b/doc/using/UART_srcs/vhpi/tty_pkg.vhd
new file mode 100644
index 000000000..99e3a347f
--- /dev/null
+++ b/doc/using/UART_srcs/vhpi/tty_pkg.vhd
@@ -0,0 +1,70 @@
+--tty_pkg.vhd
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+package tty_pkg is
+
+ function to_integer( s: std_logic) return integer;
+ function to_std_logic( s : integer ) return std_logic;
+
+ function tty_open (portn : integer) return integer;
+ attribute foreign of tty_open :
+ function is "VHPIDIRECT tty_open";
+
+ function read_data ( dummy: integer) return integer;
+ attribute foreign of read_data :
+ function is "VHPIDIRECT read_data";
+
+ function read_enable ( dummy: integer) return integer;
+ attribute foreign of read_enable :
+ function is "VHPIDIRECT read_enable";
+
+ procedure write_data ( data: in integer);
+ attribute foreign of write_data :
+ procedure is "VHPIDIRECT write_data";
+
+end;
+
+
+package body tty_pkg is
+
+ function to_integer( s : std_logic ) return integer is
+ begin
+ if s = '1' then
+ return 1;
+ else
+ return 0;
+ end if;
+ end function;
+
+ function to_std_logic( s : integer ) return std_logic is
+ begin
+ if s > 0 then
+ return '1';
+ else
+ return '0';
+ end if;
+ end function;
+
+
+ function tty_open (portn : integer) return integer is
+ begin
+ assert false report "VHPI" severity failure;
+ end tty_open;
+
+ function read_data (dummy: integer) return integer is
+ begin
+ assert false report "VHPI" severity failure;
+ end read_data;
+
+ function read_enable (dummy: integer) return integer is
+ begin
+ assert false report "VHPI" severity failure;
+ end read_enable;
+
+ procedure write_data ( data: in integer) is
+ begin
+ assert false report "VHPI" severity failure;
+ end write_data;
+end tty_pkg;
diff --git a/doc/using/UART_srcs/vhpi/zeichnung.png b/doc/using/UART_srcs/vhpi/zeichnung.png
new file mode 100644
index 000000000..fbfdec259
--- /dev/null
+++ b/doc/using/UART_srcs/vhpi/zeichnung.png
Binary files differ