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authorumarcor <38422348+umarcor@users.noreply.github.com>2020-04-14 17:42:35 +0200
committerGitHub <noreply@github.com>2020-04-14 17:42:35 +0200
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doc: split 'Interfacing to other languages' to ghdl/ghdl-cosim (#1216)
* doc: move co-simulation content to ghdl/ghdl-cosim * doc: fix option ref syntax * doc: move examples to ghdl/ghdl-cosim
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diff --git a/doc/using/Synthesis.rst b/doc/using/Synthesis.rst
index c236152e6..23924fd94 100644
--- a/doc/using/Synthesis.rst
+++ b/doc/using/Synthesis.rst
@@ -58,7 +58,7 @@ Artifacts generated by Yosys can be used in multiple open source and vendor tool
etc. A relevant feature of combining GHDL and Yosys is that mixed-language (VHDL-Verilog) synthesis with open source
tools is possible.
-The command line syntax for this plugin is the same as for :option:``--synth``, except that the command name (``--synth``)
+The command line syntax for this plugin is the same as for :option:`--synth`, except that the command name (``--synth``)
is neither required nor supported. Instead, ``yosys``, ``yosys -m ghdl`` or ``yosys -m path/to/ghdl.so`` need to be used,
depending of how is the plugin built. See `README <https://github.com/ghdl/ghdl-yosys-plugin>`_ for building and installation
guidelines.