vhdl: --std93c is now an alias for --std=93 -frelaxed

This simplifies the definition of --std=93c

19 files changed, 84 insertions, 67 deletions

diff --git a/doc/using/ImplementationOfVHDL.rst b/doc/using/ImplementationOfVHDL.rst
index 8cad2e03e..331a7e10c 100644
--- a/doc/using/ImplementationOfVHDL.rst
+++ b/doc/using/ImplementationOfVHDL.rst
@@ -81,13 +81,7 @@ You can select the VHDL standard expected by GHDL with the
   Select VHDL-93; VHDL-87 file declarations are not accepted.
 
 93c
-  Select VHDL-93 standard with relaxed rules:
-
-
-  * VHDL-87 file declarations are accepted;
-
-  * default binding indication rules of VHDL-02 are used. Default binding rules
-    are often used, but they are particularly obscure before VHDL-02.
+  Same as 93 and :option:`-frelaxed`.
 
 00
   Select VHDL-2000 standard, which adds protected types.
diff --git a/doc/using/InvokingGHDL.rst b/doc/using/InvokingGHDL.rst
index 63af39f08..64c1610e1 100644
--- a/doc/using/InvokingGHDL.rst
+++ b/doc/using/InvokingGHDL.rst
@@ -253,7 +253,9 @@ Options
 
 .. option:: --std=<STANDARD>
 
-  Specify the standard to use. By default, the standard is ``93c``, which means VHDL-93 accepting VHDL-87 syntax. For details on ``STANDARD`` values see section :ref:`VHDL_standards`.
+  Specify the standard to use. By default, the standard is ``93c``,
+  which means VHDL-93 with relaxed rules. For details on ``STANDARD``
+  values see section :ref:`VHDL_standards`.
 
 .. option:: -fsynopsys
 
@@ -318,22 +320,33 @@ Options
 .. option:: -frelaxed
 .. option:: -frelaxed-rules
 
-  Within an object declaration, allow references to the name (which references the hidden declaration). This ignores the error in the following code:
+  Slightly relax some rules to be compatible with various other
+  simulators or synthesizers:
 
-  .. code-block:: VHDL
+  * VHDL-87 file declarations are accepted;
 
-   package pkg1 is
-     type state is (state1, state2, state3);
-   end pkg1;
+  * Default binding indication rules of VHDL-02 are used. Default binding rules
+    are often used, but they are particularly obscure before VHDL-02.
 
-   use work.pkg1.all;
-   package pkg2 is
-     constant state1 : state := state1;
-   end pkg2;
+  * Within an object declaration, allow references to the name (which references the hidden declaration). This ignores the error in the following code:
 
-  Some code (such as Xilinx packages) have such constructs, which are valid.
+    .. code-block:: VHDL
 
-  (The scope of the ``state1`` constant starts at the `constant` keyword. Because the constant ``state1`` and the enumeration literal ``state1`` are homographs, the enumeration literal is hidden in the immediate scope of the constant).
+     package pkg1 is
+       type state is (state1, state2, state3);
+     end pkg1;
+
+     use work.pkg1.all;
+     package pkg2 is
+       constant state1 : state := state1;
+     end pkg2;
+
+    Some code (such as Xilinx packages) have such constructs, which are valid.
+
+    (The scope of the ``state1`` constant starts at the `constant`
+    keyword. Because the constant ``state1`` and the enumeration
+    literal ``state1`` are homographs, the enumeration literal is
+    hidden in the immediate scope of the constant).
 
   This option also relaxes the rules about pure functions. Violations result in warnings instead of errors.
 
diff --git a/src/flags.adb b/src/flags.adb
index cc0e0815a..8be5bb659 100644
--- a/src/flags.adb
+++ b/src/flags.adb
@@ -22,10 +22,9 @@ package body Flags is
       case Vhdl_Std is
          when Vhdl_87 =>
             Flag_String (1 .. 2) := "87";
-         when Vhdl_93c
-           | Vhdl_93
-           | Vhdl_00
-           | Vhdl_02 =>
+         when Vhdl_93
+            | Vhdl_00
+            | Vhdl_02 =>
             Flag_String (1 .. 2) := "93";
          when Vhdl_08 =>
             Flag_String (1 .. 2) := "08";
diff --git a/src/flags.ads b/src/flags.ads
index b05a830a3..06d6d276a 100644
--- a/src/flags.ads
+++ b/src/flags.ads
@@ -26,10 +26,10 @@ package Flags is
    --  List of vhdl standards.
    --  VHDL_93c is vhdl_93 with backward compatibility with 87 (file).
    type Vhdl_Std_Type is
-     (Vhdl_87, Vhdl_93c, Vhdl_93, Vhdl_00, Vhdl_02, Vhdl_08);
+     (Vhdl_87, Vhdl_93, Vhdl_00, Vhdl_02, Vhdl_08);
 
    --  Standard accepted.
-   Vhdl_Std: Vhdl_Std_Type := Vhdl_93c;
+   Vhdl_Std: Vhdl_Std_Type := Vhdl_93;
 
    --  Enable AMS-VHDL extensions.
    AMS_Vhdl : Boolean := False;
@@ -146,7 +146,10 @@ package Flags is
    --  * the scope of an object declaration names start after the declaration,
    --    so that it is possible to use the old name in the default expression:
    --    constant x : xtype := x;
-   Flag_Relaxed_Rules : Boolean := False;
+   Flag_Relaxed_Rules : Boolean := True;
+
+   --  If true allows vhdl-87 file style.  Enabled with --std=93c
+   Flag_Relaxed_Files87 : Boolean := True;
 
    --  If true, allow to use synopsys packages (std_logic_arith & co).
    Flag_Synopsys : Boolean := False;
diff --git a/src/ghdldrv/ghdllocal.adb b/src/ghdldrv/ghdllocal.adb
index ec2356e4b..b2df3769f 100644
--- a/src/ghdldrv/ghdllocal.adb
+++ b/src/ghdldrv/ghdllocal.adb
@@ -361,10 +361,9 @@ package body Ghdllocal is
       case Vhdl_Std is
          when Vhdl_87 =>
             return "v87";
-         when Vhdl_93c
-           | Vhdl_93
-           | Vhdl_00
-           | Vhdl_02 =>
+         when Vhdl_93
+            | Vhdl_00
+            | Vhdl_02 =>
             return "v93";
          when Vhdl_08 =>
             return "v08";
diff --git a/src/libraries.adb b/src/libraries.adb
index 0425030ad..d7ff72a85 100644
--- a/src/libraries.adb
+++ b/src/libraries.adb
@@ -124,7 +124,7 @@ package body Libraries is
       case Vhdl_Std is
          when Vhdl_87 =>
             return Image_Identifier (Library) & "-obj87.cf";
-         when Vhdl_93c | Vhdl_93 | Vhdl_00 | Vhdl_02 =>
+         when Vhdl_93 | Vhdl_00 | Vhdl_02 =>
             return Image_Identifier (Library) & "-obj93.cf";
          when Vhdl_08 =>
             return Image_Identifier (Library) & "-obj08.cf";
@@ -166,7 +166,7 @@ package body Libraries is
             case Vhdl_Std is
                when Vhdl_87 =>
                   Path (L + 2 .. L + 4) := "v87";
-               when Vhdl_93c | Vhdl_93 | Vhdl_00 | Vhdl_02 =>
+               when Vhdl_93 | Vhdl_00 | Vhdl_02 =>
                   Path (L + 2 .. L + 4) := "v93";
                when Vhdl_08 =>
                   Path (L + 2 .. L + 4) := "v08";
diff --git a/src/options.adb b/src/options.adb
index a68f949a4..bf97e4533 100644
--- a/src/options.adb
+++ b/src/options.adb
@@ -89,6 +89,8 @@ package body Options is
       pragma Assert (Opt'First = 1);
    begin
       if Opt'Last > 5 and then Opt (1 .. 6) = "--std=" then
+         Flag_Relaxed_Rules := False;
+         Flag_Relaxed_Files87 := False;
          if Opt'Length = 8 then
             if Opt (7 .. 8) = "87" then
                Vhdl_Std := Vhdl_87;
@@ -105,7 +107,9 @@ package body Options is
                return Option_Err;
             end if;
          elsif Opt'Length = 9 and then Opt (7 .. 9) = "93c" then
-            Vhdl_Std := Vhdl_93c;
+            Vhdl_Std := Vhdl_93;
+            Flag_Relaxed_Rules := True;
+            Flag_Relaxed_Files87 := True;
          else
             Error_Msg_Option ("unknown language standard");
             return Option_Err;
diff --git a/src/vhdl/vhdl-errors.adb b/src/vhdl/vhdl-errors.adb
index 4e693e932..9806595ac 100644
--- a/src/vhdl/vhdl-errors.adb
+++ b/src/vhdl/vhdl-errors.adb
@@ -120,7 +120,7 @@ package body Vhdl.Errors is
    is
       Level : Msgid_Type;
    begin
-      if Flag_Relaxed_Rules or Vhdl_Std = Vhdl_93c then
+      if Flag_Relaxed_Rules then
          if not Is_Warning_Enabled (Id) then
             return;
          end if;
diff --git a/src/vhdl/vhdl-parse.adb b/src/vhdl/vhdl-parse.adb
index 9e4a930a9..820594579 100644
--- a/src/vhdl/vhdl-parse.adb
+++ b/src/vhdl/vhdl-parse.adb
@@ -4200,7 +4200,9 @@ package body Vhdl.Parse is
 
             case Current_Token is
                when Tok_In | Tok_Out | Tok_Inout =>
-                  if Flags.Vhdl_Std >= Vhdl_93 then
+                  if Flags.Vhdl_Std /= Vhdl_87
+                    and then not Flags.Flag_Relaxed_Files87
+                  then
                      Error_Msg_Parse ("mode allowed only in vhdl 87");
                   end if;
                   Mode := Parse_Mode;
@@ -7478,7 +7480,7 @@ package body Vhdl.Parse is
       Expect_Scan (Tok_End);
       Expect_Scan (Tok_Case);
 
-      if Flags.Vhdl_Std >= Vhdl_93c then
+      if Flags.Vhdl_Std >= Vhdl_93 then
          Check_End_Name (Stmt);
       end if;
 
@@ -7782,7 +7784,7 @@ package body Vhdl.Parse is
                Stmt := Parse_If_Statement (Parent);
                Set_Label (Stmt, Label);
                Set_Location (Stmt, Loc);
-               if Flags.Vhdl_Std >= Vhdl_93c then
+               if Flags.Vhdl_Std >= Vhdl_93 then
                   Check_End_Name (Stmt);
                end if;
             when Tok_Case =>
diff --git a/src/vhdl/vhdl-sem.adb b/src/vhdl/vhdl-sem.adb
index 107aa918f..8311e816f 100644
--- a/src/vhdl/vhdl-sem.adb
+++ b/src/vhdl/vhdl-sem.adb
@@ -560,7 +560,7 @@ package body Vhdl.Sem is
             Set_Collapse_Signal_Flag (Assoc, False);
 
             pragma Assert (Is_Null (Get_Actual_Conversion (Assoc)));
-            if Flags.Vhdl_Std >= Vhdl_93c then
+            if Flags.Vhdl_Std >= Vhdl_93 then
                --  LRM93 1.1.1.2 Ports
                --  Moreover, the ports of a block may be associated
                --  with an expression, in order to provide these ports
diff --git a/src/vhdl/vhdl-sem_assocs.adb b/src/vhdl/vhdl-sem_assocs.adb
index d1e52b646..4a5ccd1e8 100644
--- a/src/vhdl/vhdl-sem_assocs.adb
+++ b/src/vhdl/vhdl-sem_assocs.adb
@@ -353,7 +353,9 @@ package body Vhdl.Sem_Assocs is
                            --  LRM87 4.3.1.4
                            --  Such an object is a member of the variable
                            --  class of objects;
-                           if Flags.Vhdl_Std >= Vhdl_93 then
+                           if Flags.Vhdl_Std >= Vhdl_93
+                             and then not Flags.Flag_Relaxed_Files87
+                           then
                               Error_Msg_Sem
                                 (+Assoc, "variable parameter cannot be a "
                                    & "file (vhdl93)");
@@ -372,9 +374,12 @@ package body Vhdl.Sem_Assocs is
                            null;
                         when Iir_Kind_Variable_Declaration
                           | Iir_Kind_Interface_Variable_Declaration =>
-                           if Flags.Vhdl_Std >= Vhdl_93 then
-                              Error_Msg_Sem (+Assoc, "file parameter "
-                                               & "must be a file (vhdl93)");
+                           if Flags.Vhdl_Std >= Vhdl_93
+                             and then not Flags.Flag_Relaxed_Files87
+                           then
+                              Error_Msg_Sem
+                                (+Assoc,
+                                 "file parameter must be a file (vhdl93)");
                            end if;
                         when others =>
                            Error_Msg_Sem
@@ -492,7 +497,7 @@ package body Vhdl.Sem_Assocs is
       pragma Assert (Amode /= Iir_Unknown_Mode);
 
       case Flags.Vhdl_Std is
-         when Vhdl_87 | Vhdl_93c | Vhdl_93 | Vhdl_00 =>
+         when Vhdl_87 | Vhdl_93 | Vhdl_00 =>
             if Vhdl93_Assocs_Map (Fmode, Amode) then
                return True;
             end if;
@@ -544,9 +549,8 @@ package body Vhdl.Sem_Assocs is
          --  (during elaboration).
 
          --  In vhdl08, the subtypes must be compatible.  Use the that rule
-         --  for 93c and relaxed rules.
+         --  for relaxed rules.
          if Vhdl_Std >= Vhdl_08
-           or else Vhdl_Std = Vhdl_93c
            or else Flag_Relaxed_Rules
          then
             return Eval_Is_Range_In_Bound (Src, Dest, True);
diff --git a/src/vhdl/vhdl-sem_decls.adb b/src/vhdl/vhdl-sem_decls.adb
index 84354c2da..c7bd4ce43 100644
--- a/src/vhdl/vhdl-sem_decls.adb
+++ b/src/vhdl/vhdl-sem_decls.adb
@@ -279,6 +279,7 @@ package body Vhdl.Sem_Decls is
                      --  parameter includes the reserved word BUS.
                      if Flags.Vhdl_Std >= Vhdl_93
                        and then Interface_Kind in Parameter_Interface_List
+                       and then not Flags.Flag_Relaxed_Rules
                      then
                         Error_Msg_Sem
                           (+Inter, "signal parameter can't be of kind bus");
@@ -307,7 +308,9 @@ package body Vhdl.Sem_Decls is
             when Iir_Kind_Interface_Variable_Declaration =>
                case Get_Kind (Get_Base_Type (A_Type)) is
                   when Iir_Kind_File_Type_Definition =>
-                     if Flags.Vhdl_Std >= Vhdl_93 then
+                     if Flags.Vhdl_Std >= Vhdl_93
+                       and then not Flags.Flag_Relaxed_Rules
+                     then
                         Error_Msg_Sem
                           (+Inter,
                            "variable formal can't be a file (vhdl 93)");
diff --git a/src/vhdl/vhdl-sem_expr.adb b/src/vhdl/vhdl-sem_expr.adb
index f80a8bc2e..b7560904f 100644
--- a/src/vhdl/vhdl-sem_expr.adb
+++ b/src/vhdl/vhdl-sem_expr.adb
@@ -842,7 +842,7 @@ package body Vhdl.Sem_Expr is
             --  predefined type INTEGER is assumed if the type of both bounds
             --  (prior the implicit conversion) is the type universal_integer.
             null;
-         elsif Vhdl_Std = Vhdl_93c or else Flag_Relaxed_Rules then
+         elsif Flag_Relaxed_Rules then
             null;
          elsif Vhdl_Std /= Vhdl_93 then
             --  GHDL: this is not allowed, however often used:
diff --git a/src/vhdl/vhdl-sem_names.adb b/src/vhdl/vhdl-sem_names.adb
index c34e7a958..657eea53d 100644
--- a/src/vhdl/vhdl-sem_names.adb
+++ b/src/vhdl/vhdl-sem_names.adb
@@ -4035,9 +4035,7 @@ package body Vhdl.Sem_Names is
       --     and whose suffix is one of the predefined attributes 'DELAYED,
       --     'STABLE, 'QUIET or 'TRANSACTION.
       --  According to LRM 6.1, attributes are not static names.
-      if Flags.Vhdl_Std = Vhdl_93c or Flag_Relaxed_Rules
-        or Flags.Vhdl_Std >= Vhdl_02
-      then
+      if Flag_Relaxed_Rules or Flags.Vhdl_Std >= Vhdl_02 then
          case Get_Kind (Res) is
             when Iir_Kind_Stable_Attribute
               | Iir_Kind_Quiet_Attribute
diff --git a/src/vhdl/vhdl-sem_specs.adb b/src/vhdl/vhdl-sem_specs.adb
index eca951a2b..f3fb7bf30 100644
--- a/src/vhdl/vhdl-sem_specs.adb
+++ b/src/vhdl/vhdl-sem_specs.adb
@@ -365,10 +365,10 @@ package body Vhdl.Sem_Specs is
       Set_Attribute_Value_Spec_Chain (Attr, El);
 
       --  Special handling for 'Foreign.
-      if (Flags.Vhdl_Std >= Vhdl_93c
+      if (Flags.Vhdl_Std >= Vhdl_93
           and then Attr_Decl = Foreign_Attribute)
         or else
-        (Flags.Vhdl_Std <= Vhdl_93c
+        (Flags.Vhdl_Std <= Vhdl_93
          and then Get_Identifier (Attr_Decl) = Std_Names.Name_Foreign)
       then
          --  LRM93 12.4
@@ -769,7 +769,7 @@ package body Vhdl.Sem_Specs is
          Inter : Name_Interpretation_Type;
          Decl : Iir;
       begin
-         if Flag_Relaxed_Rules or Vhdl_Std = Vhdl_93c then
+         if Flag_Relaxed_Rules then
             --  Some (clueless ?) vendors put attribute specifications in
             --  architectures for ports (declared in entities).  This is not
             --  valid according to the LRM (eg: LRM02 5.1 Attribute
@@ -2003,8 +2003,8 @@ package body Vhdl.Sem_Specs is
       --     containing the design unit in which the component C is
       --     declared.
       if Flags.Flag_Syn_Binding
+        or Flags.Flag_Relaxed_Rules
         or Flags.Vhdl_Std >= Vhdl_02
-        or Flags.Vhdl_Std = Vhdl_93c
       then
          --  Find target library.
          Target_Lib := Comp;
@@ -2077,7 +2077,7 @@ package body Vhdl.Sem_Specs is
       --     containing the design unit in which the component C is
       --     declared.
       if Flags.Vhdl_Std >= Vhdl_02
-        or else Flags.Vhdl_Std = Vhdl_93c
+        or else Flags.Flag_Relaxed_Rules
       then
          Decl := Comp;
          while Get_Kind (Decl) /= Iir_Kind_Library_Declaration loop
diff --git a/src/vhdl/vhdl-sem_stmts.adb b/src/vhdl/vhdl-sem_stmts.adb
index 829bf2d20..fbee2e756 100644
--- a/src/vhdl/vhdl-sem_stmts.adb
+++ b/src/vhdl/vhdl-sem_stmts.adb
@@ -1031,10 +1031,8 @@ package body Vhdl.Sem_Stmts is
                end if;
                --  GHDL: I don't understand why the indexing expressions
                --  must be locally static.  So I don't check this in 93c.
-               if Flags.Vhdl_Std /= Vhdl_93c
-                 and then
-                 (Get_Expr_Staticness
-                    (Get_Nth_Element (Get_Index_List (Expr), 0)) /= Locally)
+               if (Get_Expr_Staticness
+                   (Get_Nth_Element (Get_Index_List (Expr), 0)) /= Locally)
                then
                   Error_Msg_Sem
                     (+Expr, "indexing expression must be locally static");
diff --git a/src/vhdl/vhdl-sem_types.adb b/src/vhdl/vhdl-sem_types.adb
index 1d8bb3a33..a0b9a1c4d 100644
--- a/src/vhdl/vhdl-sem_types.adb
+++ b/src/vhdl/vhdl-sem_types.adb
@@ -1364,7 +1364,7 @@ package body Vhdl.Sem_Types is
       end if;
       -- LRM93 2.4
       --  A resolution function must be a [pure] function;
-      if Flags.Vhdl_Std >= Vhdl_93 and then Get_Pure_Flag (Func) = False then
+      if not Flags.Flag_Relaxed_Rules and then not Get_Pure_Flag (Func) then
          if Atype /= Null_Iir then
             Error_Msg_Sem (+Atype, "resolution %n must be pure", +Func);
          end if;
diff --git a/src/vhdl/vhdl-sem_utils.adb b/src/vhdl/vhdl-sem_utils.adb
index bd4f20eef..a20aea369 100644
--- a/src/vhdl/vhdl-sem_utils.adb
+++ b/src/vhdl/vhdl-sem_utils.adb
@@ -147,7 +147,7 @@ package body Vhdl.Sem_Utils is
       Last := Decl;
       Loc := Get_Location (Decl);
 
-      if Flags.Vhdl_Std >= Vhdl_93c then
+      if Flags.Vhdl_Std >= Vhdl_93 then
          for I in 1 .. 2 loop
             --  Create the implicit file_open (form 1) declaration.
             --  Create the implicit file_open (form 2) declaration.
diff --git a/src/vhdl/vhdl-std_package.adb b/src/vhdl/vhdl-std_package.adb
index f2ba54382..1fc5fcd8a 100644
--- a/src/vhdl/vhdl-std_package.adb
+++ b/src/vhdl/vhdl-std_package.adb
@@ -868,7 +868,7 @@ package body Vhdl.Std_Package is
 
          Constraint : Iir_Range_Expression;
       begin
-         if Vhdl_Std >= Vhdl_93c then
+         if Vhdl_Std >= Vhdl_93 then
             Time_Staticness := Globally;
          else
             Time_Staticness := Locally;
@@ -953,7 +953,7 @@ package body Vhdl.Std_Package is
 
          --  VHDL93
          --  subtype DELAY_LENGTH is TIME range 0 to TIME'HIGH
-         if Vhdl_Std >= Vhdl_93c then
+         if Vhdl_Std >= Vhdl_93 then
             Delay_Length_Subtype_Definition :=
               Create_Std_Iir (Iir_Kind_Physical_Subtype_Definition);
             Set_Subtype_Type_Mark
@@ -1258,7 +1258,7 @@ package body Vhdl.Std_Package is
 
       --  VHDL93:
       --  type file_open_kind is (read_mode, write_mode, append_mode);
-      if Vhdl_Std >= Vhdl_93c then
+      if Vhdl_Std >= Vhdl_93 then
          File_Open_Kind_Type_Definition :=
            Create_Std_Iir (Iir_Kind_Enumeration_Type_Definition);
          Set_Base_Type (File_Open_Kind_Type_Definition,
@@ -1297,7 +1297,7 @@ package body Vhdl.Std_Package is
       --  VHDL93:
       --  type file_open_status is
       --      (open_ok, status_error, name_error, mode_error);
-      if Vhdl_Std >= Vhdl_93c then
+      if Vhdl_Std >= Vhdl_93 then
          File_Open_Status_Type_Definition :=
            Create_Std_Iir (Iir_Kind_Enumeration_Type_Definition);
          Set_Base_Type (File_Open_Status_Type_Definition,
@@ -1337,7 +1337,7 @@ package body Vhdl.Std_Package is
 
       --  VHDL93:
       --  attribute FOREIGN: string;
-      if Vhdl_Std >= Vhdl_93c then
+      if Vhdl_Std >= Vhdl_93 then
          Foreign_Attribute := Create_Std_Decl (Iir_Kind_Attribute_Declaration);
          Set_Std_Identifier (Foreign_Attribute, Name_Foreign);
          Set_Type_Mark (Foreign_Attribute,
@@ -1445,7 +1445,7 @@ package body Vhdl.Std_Package is
       Change_Unit (Get_Right_Limit (Rng), Prim);
 
       --  Adjust range of DELAY_LENGTH.
-      if Vhdl_Std >= Vhdl_93c then
+      if Vhdl_Std >= Vhdl_93 then
          Rng := Get_Range_Constraint (Delay_Length_Subtype_Definition);
          Change_Unit (Get_Left_Limit (Rng), Prim);
          Change_Unit (Get_Right_Limit (Rng), Prim);