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| author | Tristan Gingold <tgingold@free.fr> | 2020-05-03 08:31:25 +0200 | 
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-05-04 19:04:07 +0200 | 
| commit | dbbd98a06f7802cc309e2884f7dfabf71942c115 (patch) | |
| tree | e044a101ea3939d0f8e512f2a4e87f4fa66a90bf | |
| parent | 012cd7bb501aea20b41fc63516e67256dc62fd5c (diff) | |
| download | ghdl-dbbd98a06f7802cc309e2884f7dfabf71942c115.tar.gz ghdl-dbbd98a06f7802cc309e2884f7dfabf71942c115.tar.bz2 ghdl-dbbd98a06f7802cc309e2884f7dfabf71942c115.zip | |
synth: use tri_state_type for seq_assign_value.
| -rw-r--r-- | src/synth/synth-environment-debug.adb | 13 | ||||
| -rw-r--r-- | src/synth/synth-environment.adb | 121 | ||||
| -rw-r--r-- | src/synth/synth-environment.ads | 11 | ||||
| -rw-r--r-- | src/synth/synth-stmts.adb | 3 | 
4 files changed, 81 insertions, 67 deletions
| diff --git a/src/synth/synth-environment-debug.adb b/src/synth/synth-environment-debug.adb index 81e8b17af..3278e8ba9 100644 --- a/src/synth/synth-environment-debug.adb +++ b/src/synth/synth-environment-debug.adb @@ -84,11 +84,14 @@ package body Synth.Environment.Debug is           New_Line;        end;        Put_Line (" value:"); -      if Rec.Val.Is_Static then -         Put_Line ("   static"); -      else -         Dump_Partial_Assign (Rec.Val.Asgns); -      end if; +      case Rec.Val.Is_Static is +         when Unknown => +            Put_Line ("   ??? (unknown)"); +         when True => +            Put_Line ("   static"); +         when False => +            Dump_Partial_Assign (Rec.Val.Asgns); +      end case;     end Dump_Assign;     procedure Dump_Phi (Id : Phi_Id) diff --git a/src/synth/synth-environment.adb b/src/synth/synth-environment.adb index 6ae560a2f..791c9cb09 100644 --- a/src/synth/synth-environment.adb +++ b/src/synth/synth-environment.adb @@ -143,7 +143,7 @@ package body Synth.Environment is     function Get_Assign_Is_Static (Asgn : Seq_Assign) return Boolean is     begin -      return Assign_Table.Table (Asgn).Val.Is_Static; +      return Assign_Table.Table (Asgn).Val.Is_Static = True;     end Get_Assign_Is_Static;     function Get_Assign_Static_Val (Asgn : Seq_Assign) return Memtyp is @@ -218,7 +218,7 @@ package body Synth.Environment is        Next_Off : Uns32;        Next_Val : Net;     begin -      if Head.Is_Static then +      if Head.Is_Static /= False then           return;        end if; @@ -365,33 +365,37 @@ package body Synth.Environment is        --  Check output is not already assigned.        pragma Assert (Get_Input_Net (Get_Net_Parent (Outport), 0) = No_Net); -      if Asgn_Rec.Val.Is_Static then -         Res := Synth.Context.Get_Memtyp_Net (Asgn_Rec.Val.Val); -         Add_Conc_Assign (Wid, Res, 0, Stmt); -      else -         P := Asgn_Rec.Val.Asgns; -         pragma Assert (P /= No_Partial_Assign); -         while P /= No_Partial_Assign loop -            declare -               Pa : Partial_Assign_Record renames -                 Partial_Assign_Table.Table (P); -            begin -               if Synth.Flags.Flag_Debug_Noinference then -                  Res := Pa.Value; -               else -                  --  Note: lifetime is currently based on the kind of the -                  --   wire (variable -> not reused beyond this process). -                  --   This is OK for vhdl but not general. -                  Res := Inference.Infere -                    (Ctxt, Pa.Value, Pa.Offset, Outport, Stmt, -                     Wire_Rec.Kind = Wire_Variable); -               end if; +      case Asgn_Rec.Val.Is_Static is +         when Unknown => +            raise Internal_Error; +         when True => +            --  Create a net.  No inference to do. +            Res := Synth.Context.Get_Memtyp_Net (Asgn_Rec.Val.Val); +            Add_Conc_Assign (Wid, Res, 0, Stmt); +         when False => +            P := Asgn_Rec.Val.Asgns; +            pragma Assert (P /= No_Partial_Assign); +            while P /= No_Partial_Assign loop +               declare +                  Pa : Partial_Assign_Record renames +                    Partial_Assign_Table.Table (P); +               begin +                  if Synth.Flags.Flag_Debug_Noinference then +                     Res := Pa.Value; +                  else +                     --  Note: lifetime is currently based on the kind of the +                     --   wire (variable -> not reused beyond this process). +                     --   This is OK for vhdl but not general. +                     Res := Inference.Infere +                       (Ctxt, Pa.Value, Pa.Offset, Outport, Stmt, +                        Wire_Rec.Kind = Wire_Variable); +                  end if; -               Add_Conc_Assign (Wid, Res, Pa.Offset, Stmt); -               P := Pa.Next; -            end; -         end loop; -      end if; +                  Add_Conc_Assign (Wid, Res, Pa.Offset, Stmt); +                  P := Pa.Next; +               end; +            end loop; +      end case;     end Pop_And_Merge_Phi_Wire;     --  This procedure is called after each concurrent statement to assign @@ -423,7 +427,7 @@ package body Synth.Environment is              Asgn_Rec : Seq_Assign_Record renames Assign_Table.Table (Asgn);              P : Partial_Assign;           begin -            if not Asgn_Rec.Val.Is_Static then +            if Asgn_Rec.Val.Is_Static = False then                 P := Asgn_Rec.Val.Asgns;                 pragma Assert (P /= No_Partial_Assign);                 while P /= No_Partial_Assign loop @@ -457,7 +461,7 @@ package body Synth.Environment is              Asgn_Rec : Seq_Assign_Record renames Assign_Table.Table (Asgn);              P : Partial_Assign;           begin -            if not Asgn_Rec.Val.Is_Static then +            if Asgn_Rec.Val.Is_Static = False then                 P := Asgn_Rec.Val.Asgns;                 pragma Assert (P /= No_Partial_Assign);                 while P /= No_Partial_Assign loop @@ -507,17 +511,20 @@ package body Synth.Environment is              --  Phi_Assign.              Next_Asgn := Asgn_Rec.Chain;              if Wid <= Mark then -               if Asgn_Rec.Val.Is_Static then -                  Phi_Assign_Static (Wid, Asgn_Rec.Val.Val); -               else -                  Pasgn := Asgn_Rec.Val.Asgns; -                  while Pasgn /= No_Partial_Assign loop -                     Next_Pasgn := Get_Partial_Next (Pasgn); -                     Set_Partial_Next (Pasgn, No_Partial_Assign); -                     Phi_Assign (Ctxt, Wid, Pasgn); -                     Pasgn := Next_Pasgn; -                  end loop; -               end if; +               case Asgn_Rec.Val.Is_Static is +                  when Unknown => +                     raise Internal_Error; +                  when True => +                     Phi_Assign_Static (Wid, Asgn_Rec.Val.Val); +                  when False => +                     Pasgn := Asgn_Rec.Val.Asgns; +                     while Pasgn /= No_Partial_Assign loop +                        Next_Pasgn := Get_Partial_Next (Pasgn); +                        Set_Partial_Next (Pasgn, No_Partial_Assign); +                        Phi_Assign (Ctxt, Wid, Pasgn); +                        Pasgn := Next_Pasgn; +                     end loop; +               end case;              end if;              Asgn := Next_Asgn;           end; @@ -940,7 +947,7 @@ package body Synth.Environment is              raise Internal_Error;        end case; -      if Asgn_Rec.Val.Is_Static then +      if Asgn_Rec.Val.Is_Static = True then           return Synth.Context.Get_Memtyp_Net (Asgn_Rec.Val.Val);        end if; @@ -1328,12 +1335,15 @@ package body Synth.Environment is     is        N : Net;     begin -      if Val.Is_Static then -         N := Synth.Context.Get_Memtyp_Net (Val.Val); -         return New_Partial_Assign (N, 0); -      else -         return Val.Asgns; -      end if; +      case Val.Is_Static is +         when Unknown => +            return No_Partial_Assign; +         when True => +            N := Synth.Context.Get_Memtyp_Net (Val.Val); +            return New_Partial_Assign (N, 0); +         when False => +            return Val.Asgns; +      end case;     end Get_Assign_Value_Force;     --  Force the value of a Seq_Assign to be a net if needed, return it. @@ -1349,7 +1359,7 @@ package body Synth.Environment is        Prev : Memtyp;     begin        --  First case: both TV and FV are static. -      if Tv.Is_Static and then Fv.Is_Static then +      if Tv.Is_Static = True and then Fv.Is_Static = True then           if Is_Equal (Tv.Val, Fv.Val) then              Phi_Assign_Static (Wid, Tv.Val);              return True; @@ -1358,13 +1368,8 @@ package body Synth.Environment is           end if;        end if; -      --  If either TV or FV are not static, they cannot be merged. -      if not Tv.Is_Static and then Tv.Asgns /= No_Partial_Assign -      then -         return False; -      end if; -      if not Fv.Is_Static and then Fv.Asgns /= No_Partial_Assign -      then +      --  If either TV or FV are nets, they cannot be merged. +      if Tv.Is_Static = False or else Fv.Is_Static = False then           return False;        end if; @@ -1388,11 +1393,11 @@ package body Synth.Environment is           Prev := Get_Assign_Static_Val (First_Seq);        end; -      if Tv.Is_Static then +      if Tv.Is_Static = True then           pragma Assert (Fv = No_Seq_Assign_Value);           return Is_Equal (Tv.Val, Prev);        else -         pragma Assert (Fv.Is_Static); +         pragma Assert (Fv.Is_Static = True);           pragma Assert (Tv = No_Seq_Assign_Value);           return Is_Equal (Fv.Val, Prev);        end if; diff --git a/src/synth/synth-environment.ads b/src/synth/synth-environment.ads index a2f209302..f6d936083 100644 --- a/src/synth/synth-environment.ads +++ b/src/synth/synth-environment.ads @@ -271,8 +271,14 @@ private        Nbr_Final_Assign : Natural;     end record; -   type Seq_Assign_Value (Is_Static : Boolean := True) is record +   type Seq_Assign_Value (Is_Static : Tri_State_Type := True) is record        case Is_Static is +         when Unknown => +            --  Used only for no value (in that case, it will use the previous +            --  value). +            --  This is used only for temporary handling, and is never stored +            --  in Seq_Assign. +            null;           when True =>              Val : Memtyp;           when False => @@ -281,8 +287,7 @@ private        end case;     end record; -   No_Seq_Assign_Value : constant Seq_Assign_Value := -     (Is_Static => False, Asgns => No_Partial_Assign); +   No_Seq_Assign_Value : constant Seq_Assign_Value := (Is_Static => Unknown);     type Seq_Assign_Record is record        --  Target of the assignment. diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb index 2f354ee6d..e94122674 100644 --- a/src/synth/synth-stmts.adb +++ b/src/synth/synth-stmts.adb @@ -1055,12 +1055,13 @@ package body Synth.Stmts is                 end if;              end loop; +            --  Compute the final value for each partial part of the wire.              Partial_Assign_Init (List);              Min_Off := 0;              loop                 Off := Min_Off; -               -- Extract value of partial assignments to NETS. +               --  Extract value of partial assignments to NETS.                 Extract_Merge_Partial_Assigns                   (Build_Context, Pasgns.all, Nets.all, Off, Wd);                 exit when Off = Uns32'Last and Wd = Width'Last; | 
