testsuite/pyunit/libghdl: add tests for line comments

4 files changed, 27 insertions, 1 deletions

diff --git a/testsuite/pyunit/libghdl/Comments.py b/testsuite/pyunit/libghdl/Comments.py
index d619a042e..594571a5d 100644
--- a/testsuite/pyunit/libghdl/Comments.py
+++ b/testsuite/pyunit/libghdl/Comments.py
@@ -233,6 +233,9 @@ class Instantiate(TestCase):
     def test_element_2(self) -> None:
         self.checkFile(self._root / "element_2.vhdl")
 
+    def test_element_3(self) -> None:
+        self.checkFile(self._root / "element_3.vhdl")
+
     @expectedFailure
     def test_enum_fail(self) -> None:
         self.checkFile(self._root / "enum_fail.vhdl")
@@ -250,6 +253,9 @@ class Instantiate(TestCase):
     def test_enumlit_2(self) -> None:
         self.checkFile(self._root / "enumlit_2.vhdl")
 
+    def test_enumlit_3(self) -> None:
+        self.checkFile(self._root / "enumlit_3.vhdl")
+
     @expectedFailure
     def test_func_fail(self) -> None:
         self.checkFile(self._root / "func_fail.vhdl")
@@ -274,5 +280,7 @@ class Instantiate(TestCase):
     def test_multi1(self) -> None:
         self.checkFile(self._root / "multi1.vhdl")
 
-# TODO: first comment
+    def test_line1(self) -> None:
+        self.checkFile(self._root / "line1.vhdl")
+
 # Empty line before to easy cut & put
diff --git a/testsuite/pyunit/libghdl/element_3.vhdl b/testsuite/pyunit/libghdl/element_3.vhdl
new file mode 100644
index 000000000..22f20349e
--- /dev/null
+++ b/testsuite/pyunit/libghdl/element_3.vhdl
@@ -0,0 +1,6 @@
+package p is
+  type rec is record
+    a : bit; --  Comment for :a:
+    b : bit; --  For :b:
+  end record;
+end p;
diff --git a/testsuite/pyunit/libghdl/enumlit_3.vhdl b/testsuite/pyunit/libghdl/enumlit_3.vhdl
new file mode 100644
index 000000000..7f325f549
--- /dev/null
+++ b/testsuite/pyunit/libghdl/enumlit_3.vhdl
@@ -0,0 +1,8 @@
+package p is
+  type state_t is
+    (
+      s1,  --  For :s1:
+      s2,
+      s3  --  For :s3:
+      );
+end p;
diff --git a/testsuite/pyunit/libghdl/line1.vhdl b/testsuite/pyunit/libghdl/line1.vhdl
new file mode 100644
index 000000000..2a4ed11bc
--- /dev/null
+++ b/testsuite/pyunit/libghdl/line1.vhdl
@@ -0,0 +1,4 @@
+architecture arch of ent is
+  signal b1 : bit;  --  Comment for :b1:
+begin
+end arch;