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| author | Tristan Gingold <tgingold@free.fr> | 2020-04-28 08:17:42 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-04-28 08:54:06 +0200 |
| commit | ad4e2f38bd77ace5333b6849dd5564dcaba6bfc6 (patch) | |
| tree | 1280104bdacc6dd0ecc177cbba7a654f70002866 | |
| parent | 83183230bfa25071c6d18df457ba3e2fefa3b001 (diff) | |
| download | ghdl-ad4e2f38bd77ace5333b6849dd5564dcaba6bfc6.tar.gz ghdl-ad4e2f38bd77ace5333b6849dd5564dcaba6bfc6.tar.bz2 ghdl-ad4e2f38bd77ace5333b6849dd5564dcaba6bfc6.zip | |
testsuite/synth: add a test for previous commit.
| -rwxr-xr-x | testsuite/synth/synth109/testsuite.sh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/testsuite/synth/synth109/testsuite.sh b/testsuite/synth/synth109/testsuite.sh index 0b9a92e5d..11cb2e052 100755 --- a/testsuite/synth/synth109/testsuite.sh +++ b/testsuite/synth/synth109/testsuite.sh @@ -5,7 +5,7 @@ GHDL_STD_FLAGS="-fsynopsys" synth_tb ram1 synth_tb ram2 -#synth_tb ram4 +synth_tb ram4 synth_analyze ram9 synth asymmetric_ram_2a.vhd -e > syn_asymmetric_ram_2a.vhdl |