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authorTristan Gingold <tgingold@free.fr>2019-09-15 07:08:18 +0200
committerTristan Gingold <tgingold@free.fr>2019-09-15 07:08:18 +0200
commita4754febc694fd9836fd73050016175c4de92860 (patch)
tree3eaf42bd66ad600fe774200e7c650d5edf9d42af
parent251587405f6f760f069f1a3624296b7cb933b38e (diff)
downloadghdl-a4754febc694fd9836fd73050016175c4de92860.tar.gz
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synth: minor refactoring about const gates.
-rw-r--r--src/synth/netlists-disp_vhdl.adb58
-rw-r--r--src/synth/netlists-gates.ads9
-rw-r--r--src/synth/netlists-utils.adb12
-rw-r--r--src/synth/netlists-utils.ads2
4 files changed, 41 insertions, 40 deletions
diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb
index ee9bf13f0..ef9db9b30 100644
--- a/src/synth/netlists-disp_vhdl.adb
+++ b/src/synth/netlists-disp_vhdl.adb
@@ -326,21 +326,34 @@ package body Netlists.Disp_Vhdl is
Put (Q);
end Disp_X_Lit;
- procedure Disp_Lit (Inst : Instance)
+ procedure Disp_Constant_Inline (Inst : Instance)
is
+ Imod : constant Module := Get_Module (Inst);
O : constant Net := Get_Output (Inst, 0);
begin
- case Get_Id (Inst) is
+ case Get_Id (Imod) is
when Id_Const_UB32 =>
Disp_Binary_Lit (Get_Param_Uns32 (Inst, 0), 0, Get_Width (O));
when Id_Const_UL32 =>
Disp_Binary_Lit (Get_Param_Uns32 (Inst, 0),
Get_Param_Uns32 (Inst, 1),
Get_Width (O));
+ when Id_Const_Z =>
+ Put ('(');
+ Put_Uns32 (Get_Width (O) - 1);
+ Put (" downto 0 => 'Z')");
+ when Id_Const_X =>
+ Put ('(');
+ Put_Uns32 (Get_Width (O) - 1);
+ Put (" downto 0 => 'X')");
+ when Id_Const_Bit =>
+ Disp_Const_Bit (Inst);
+ when Id_Const_Log =>
+ raise Internal_Error;
when others =>
raise Internal_Error;
end case;
- end Disp_Lit;
+ end Disp_Constant_Inline;
function Need_Name (Inst : Instance) return Boolean
is
@@ -385,19 +398,19 @@ package body Netlists.Disp_Vhdl is
Net_Inst := Get_Parent (N);
if Flag_Merge_Lit
- and then Is_Const (Get_Id (Net_Inst))
+ and then Is_Const_Module (Get_Id (Net_Inst))
and then not Need_Name (Inst)
then
case Conv is
when Conv_None =>
- Disp_Lit (Net_Inst);
+ Disp_Constant_Inline (Net_Inst);
when Conv_Unsigned =>
Put ("unsigned'(");
- Disp_Lit (Net_Inst);
+ Disp_Constant_Inline (Net_Inst);
Put (")");
when Conv_Signed =>
Put ("signed'(");
- Disp_Lit (Net_Inst);
+ Disp_Constant_Inline (Net_Inst);
Put (")");
end case;
else
@@ -484,33 +497,6 @@ package body Netlists.Disp_Vhdl is
end loop;
end Disp_Template;
- procedure Disp_Constant_Inline (Inst : Instance)
- is
- Imod : constant Module := Get_Module (Inst);
- O : constant Net := Get_Output (Inst, 0);
- begin
- case Get_Id (Imod) is
- when Id_Const_UB32 =>
- Disp_Binary_Lit (Get_Param_Uns32 (Inst, 0), 0, Get_Width (O));
- when Id_Const_UL32 =>
- Disp_Binary_Lit (Get_Param_Uns32 (Inst, 0),
- Get_Param_Uns32 (Inst, 1),
- Get_Width (O));
- when Id_Const_Z =>
- Disp_Template ("(\n0 downto 0 => 'Z')",
- Inst, (0 => Get_Width (O) - 1));
- when Id_Const_X =>
- Disp_Template ("(\n0 downto 0 => 'X')",
- Inst, (0 => Get_Width (O) - 1));
- when Id_Const_Bit =>
- Disp_Const_Bit (Inst);
- when Id_Const_Log =>
- raise Internal_Error;
- when others =>
- raise Internal_Error;
- end case;
- end Disp_Constant_Inline;
-
procedure Disp_Instance_Inline (Inst : Instance)
is
Imod : constant Module := Get_Module (Inst);
@@ -769,7 +755,7 @@ package body Netlists.Disp_Vhdl is
for Inst of Instances (M) loop
if not Is_Self_Instance (Inst)
and then not (Flag_Merge_Lit
- and then Is_Const (Get_Id (Inst))
+ and then Is_Const_Module (Get_Id (Inst))
and then not Need_Signal (Inst))
and then Get_Id (Inst) < Id_User_None
then
@@ -816,7 +802,7 @@ package body Netlists.Disp_Vhdl is
for Inst of Instances (M) loop
if not (Flag_Merge_Lit
- and then Is_Const (Get_Id (Inst))
+ and then Is_Const_Module (Get_Id (Inst))
and then not Need_Signal (Inst))
then
Disp_Instance_Inline (Inst);
diff --git a/src/synth/netlists-gates.ads b/src/synth/netlists-gates.ads
index 7a2ffa94f..124f933a4 100644
--- a/src/synth/netlists-gates.ads
+++ b/src/synth/netlists-gates.ads
@@ -19,6 +19,10 @@
-- MA 02110-1301, USA.
package Netlists.Gates is
+ -- Id 0 is None
+ -- Id 1 is Free
+ -- Id 2 is top design
+
-- Dyadic gates. Inputs and output have the same width.
Id_And : constant Module_Id := 3;
Id_Or : constant Module_Id := 4;
@@ -155,7 +159,12 @@ package Netlists.Gates is
Id_Const_Z : constant Module_Id := 102;
Id_Const_0 : constant Module_Id := 103;
+ -- Should we keep them ?
+ pragma Unreferenced (Id_Const_UB64, Id_Const_UL64);
+
-- Large width.
Id_Const_Bit : constant Module_Id := 104;
Id_Const_Log : constant Module_Id := 105;
+
+ -- Id 128 is the first user id.
end Netlists.Gates;
diff --git a/src/synth/netlists-utils.adb b/src/synth/netlists-utils.adb
index 43da83719..20aca706a 100644
--- a/src/synth/netlists-utils.adb
+++ b/src/synth/netlists-utils.adb
@@ -96,16 +96,22 @@ package body Netlists.Utils is
return Get_Driver (Get_Input (Inst, Idx));
end Get_Input_Net;
- function Is_Const (Id : Module_Id) return Boolean is
+ function Is_Const_Module (Id : Module_Id) return Boolean is
begin
case Id is
when Id_Const_UB32
- | Id_Const_UL32 =>
+ | Id_Const_SB32
+ | Id_Const_UL32
+ | Id_Const_X
+ | Id_Const_Z
+ | Id_Const_0
+ | Id_Const_Bit
+ | Id_Const_Log =>
return True;
when others =>
return False;
end case;
- end Is_Const;
+ end Is_Const_Module;
function Is_Connected (O : Net) return Boolean is
begin
diff --git a/src/synth/netlists-utils.ads b/src/synth/netlists-utils.ads
index d98eca7ac..2f2570f3e 100644
--- a/src/synth/netlists-utils.ads
+++ b/src/synth/netlists-utils.ads
@@ -43,7 +43,7 @@ package Netlists.Utils is
function Get_Input_Net (Inst : Instance; Idx : Port_Idx) return Net;
-- Return True iff ID describe a constant.
- function Is_Const (Id : Module_Id) return Boolean;
+ function Is_Const_Module (Id : Module_Id) return Boolean;
-- Return True iff O has at least one sink (ie is connected to at least one
-- input).