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author | Tristan Gingold <tgingold@free.fr> | 2019-10-06 13:10:00 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-10-06 13:10:00 +0200 |
commit | 7748a70eb1aa9da5b8033a8955d8827385893075 (patch) | |
tree | 85738f420b4b0255b229bba96b01bbfad215527e | |
parent | 3d35074b10658634d0e1a280575fa6af0b08730f (diff) | |
download | ghdl-7748a70eb1aa9da5b8033a8955d8827385893075.tar.gz ghdl-7748a70eb1aa9da5b8033a8955d8827385893075.tar.bz2 ghdl-7748a70eb1aa9da5b8033a8955d8827385893075.zip |
netlists: remove get_parent renaming for input.
-rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 4 | ||||
-rw-r--r-- | src/synth/netlists-dump.adb | 2 | ||||
-rw-r--r-- | src/synth/netlists.adb | 2 | ||||
-rw-r--r-- | src/synth/netlists.ads | 1 | ||||
-rw-r--r-- | src/synth/synth-inference.adb | 2 |
5 files changed, 5 insertions, 6 deletions
diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index 6bf6701a5..154f9f361 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -256,7 +256,7 @@ package body Netlists.Disp_Vhdl is begin I := Get_First_Sink (O); if I /= No_Input then - O_Inst := Get_Parent (I); + O_Inst := Get_Input_Parent (I); else O_Inst := No_Instance; end if; @@ -410,7 +410,7 @@ package body Netlists.Disp_Vhdl is begin I := Get_First_Sink (Get_Output (Inst, 0)); while I /= No_Input loop - if Need_Name (Get_Parent (I)) then + if Need_Name (Get_Input_Parent (I)) then return True; end if; I := Get_Next_Sink (I); diff --git a/src/synth/netlists-dump.adb b/src/synth/netlists-dump.adb index 7b7c6615c..effb5949d 100644 --- a/src/synth/netlists-dump.adb +++ b/src/synth/netlists-dump.adb @@ -81,7 +81,7 @@ package body Netlists.Dump is procedure Dump_Input_Name (I : Input; With_Id : Boolean := False) is - Inst : constant Instance := Get_Parent (I); + Inst : constant Instance := Get_Input_Parent (I); Idx : constant Port_Idx := Get_Port_Idx (I); begin Dump_Name (Get_Instance_Name (Inst)); diff --git a/src/synth/netlists.adb b/src/synth/netlists.adb index c22302716..6597be8ed 100644 --- a/src/synth/netlists.adb +++ b/src/synth/netlists.adb @@ -572,7 +572,7 @@ package body Netlists is function Get_Port_Idx (I : Input) return Port_Idx is pragma Assert (Is_Valid (I)); - Parent : constant Instance := Get_Parent (I); + Parent : constant Instance := Get_Input_Parent (I); begin return Port_Idx (I - Instances_Table.Table (Parent).First_Input); end Get_Port_Idx; diff --git a/src/synth/netlists.ads b/src/synth/netlists.ads index def0e12b8..18d0a7b83 100644 --- a/src/synth/netlists.ads +++ b/src/synth/netlists.ads @@ -257,7 +257,6 @@ package Netlists is -- Input function Get_Input_Parent (I : Input) return Instance; - function Get_Parent (I : Input) return Instance renames Get_Input_Parent; function Get_Port_Idx (I : Input) return Port_Idx; function Get_Driver (I : Input) return Net; function Get_Next_Sink (I : Input) return Input; diff --git a/src/synth/synth-inference.adb b/src/synth/synth-inference.adb index 0b7327512..3dd919404 100644 --- a/src/synth/synth-inference.adb +++ b/src/synth/synth-inference.adb @@ -284,7 +284,7 @@ package body Synth.Inference is end if; -- The parent must be a mux (it's a chain of muxes). - Mux := Get_Parent (Get_First_Sink (Last_Out)); + Mux := Get_Input_Parent (Get_First_Sink (Last_Out)); pragma Assert (Get_Id (Mux) = Id_Mux2); -- Extract the reset condition and the reset value. |