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authorTristan Gingold <tgingold@free.fr>2022-01-16 19:05:35 +0100
committerTristan Gingold <tgingold@free.fr>2022-01-16 19:05:35 +0100
commit6bdf93f240aa4ca1a7e241acc96e79a955fe155a (patch)
tree4c1f92fd906d6d677bf3da4b9ef4babda170a353
parenta002d9d0b039afefc5651d3cc691f12ea339baed (diff)
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synth: adjust handling of subprogram calls in package instantiation. Fix #1947
-rw-r--r--src/synth/synth-vhdl_stmts.adb17
1 files changed, 14 insertions, 3 deletions
diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb
index 5f1d4a3fd..df8a851ce 100644
--- a/src/synth/synth-vhdl_stmts.adb
+++ b/src/synth/synth-vhdl_stmts.adb
@@ -1766,7 +1766,7 @@ package body Synth.Vhdl_Stmts is
Association_Iterate_Next (Iterator, Inter, Assoc);
exit when Inter = Null_Node;
- Inter_Type := Get_Subtype_Object (Caller_Inst, Get_Type (Inter));
+ Inter_Type := Get_Subtype_Object (Subprg_Inst, Get_Type (Inter));
case Iir_Parameter_Modes (Get_Mode (Inter)) is
when Iir_In_Mode =>
@@ -2188,9 +2188,20 @@ package body Synth.Vhdl_Stmts is
function Synth_Subprogram_Call
(Syn_Inst : Synth_Instance_Acc; Call : Node) return Valtyp
is
- Imp : constant Node := Get_Implementation (Call);
+ Imp : constant Node := Get_Implementation (Call);
+
+ -- The corresponding body (for a package instantiation, this could be
+ -- the shared body of the uninstantiated package).
+ Bod : constant Node := Vhdl.Sem_Inst.Get_Subprogram_Body_Origin (Imp);
+
+ -- Get the subprogram declaration of the subprogram body.
+ -- Usually, IMP = IMP2, unless of shared generic packages.
+ Imp2 : constant Node := Get_Subprogram_Specification (Bod);
+
Assoc_Chain : constant Node := Get_Parameter_Association_Chain (Call);
- Inter_Chain : constant Node := Get_Interface_Declaration_Chain (Imp);
+
+ -- Use the interfaces corresponding to the body.
+ Inter_Chain : constant Node := Get_Interface_Declaration_Chain (Imp2);
Init : Association_Iterator_Init;
begin
Init := Association_Iterator_Build (Inter_Chain, Assoc_Chain);