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author | Tristan Gingold <tgingold@free.fr> | 2020-07-09 09:10:28 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-07-18 19:19:57 +0200 |
commit | 65fd76fc13044d6ea39ff757dfbbf2798758f64c (patch) | |
tree | 4828aee126de7b3bad9d57d2d015785defce1e73 | |
parent | 1fda27561ab480e690a199ecda4f79d2f36b1f7d (diff) | |
download | ghdl-65fd76fc13044d6ea39ff757dfbbf2798758f64c.tar.gz ghdl-65fd76fc13044d6ea39ff757dfbbf2798758f64c.tar.bz2 ghdl-65fd76fc13044d6ea39ff757dfbbf2798758f64c.zip |
vhdl-sem_decls: handle multiple declarations with subtype attribute.
-rw-r--r-- | src/vhdl/vhdl-annotations.adb | 8 | ||||
-rw-r--r-- | src/vhdl/vhdl-sem_decls.adb | 6 |
2 files changed, 9 insertions, 5 deletions
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index fc1d252ce..8c083d2fd 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -641,9 +641,13 @@ package body Vhdl.Annotations is procedure Annotate_Declaration_Type (Block_Info: Sim_Info_Acc; Decl: Iir) is - Ind : constant Iir := Get_Subtype_Indication (Decl); + Ind : Iir; begin - if Ind = Null_Iir or else Get_Kind (Ind) in Iir_Kinds_Denoting_Name then + if Get_Is_Ref (Decl) then + return; + end if; + Ind := Get_Subtype_Indication (Decl); + if Get_Kind (Ind) in Iir_Kinds_Denoting_Name then return; end if; Annotate_Type_Definition (Block_Info, Ind); diff --git a/src/vhdl/vhdl-sem_decls.adb b/src/vhdl/vhdl-sem_decls.adb index 7eba27bc2..d85a0631a 100644 --- a/src/vhdl/vhdl-sem_decls.adb +++ b/src/vhdl/vhdl-sem_decls.adb @@ -953,10 +953,10 @@ package body Vhdl.Sem_Decls is else pragma Assert (Get_Kind (Last_Decl) = Get_Kind (Decl)); pragma Assert (Get_Has_Identifier_List (Last_Decl)); + Set_Is_Ref (Decl, True); Default_Value := Get_Default_Value (Last_Decl); - if Is_Valid (Default_Value) then - Set_Is_Ref (Decl, True); - end if; + Atype := Get_Subtype_Indication (Last_Decl); + Set_Subtype_Indication (Decl, Atype); Atype := Get_Type (Last_Decl); Set_Type (Decl, Atype); end if; |