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| author | Tristan Gingold <tgingold@free.fr> | 2022-09-25 06:35:10 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-09-25 11:43:29 +0200 |
| commit | 2a0e36cd66778ab48fb30e1142ae3adb187e4e46 (patch) | |
| tree | 217a75dc5e0b9aca50dff29630482f184d5b58d6 | |
| parent | aa57bf3d03e8e3856f0f4b29f042132bb8f58ab9 (diff) | |
| download | ghdl-2a0e36cd66778ab48fb30e1142ae3adb187e4e46.tar.gz ghdl-2a0e36cd66778ab48fb30e1142ae3adb187e4e46.tar.bz2 ghdl-2a0e36cd66778ab48fb30e1142ae3adb187e4e46.zip | |
synth: handle selected names in targets
| -rw-r--r-- | src/synth/synth-vhdl_stmts.adb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb index 892fa3489..62c4bc777 100644 --- a/src/synth/synth-vhdl_stmts.adb +++ b/src/synth/synth-vhdl_stmts.adb @@ -127,7 +127,8 @@ package body Synth.Vhdl_Stmts is begin case Get_Kind (Pfx) is when Iir_Kind_Simple_Name - | Iir_Kind_Attribute_Name => + | Iir_Kind_Selected_Name + | Iir_Kind_Attribute_Name => Synth_Assignment_Prefix (Syn_Inst, Inter_Inst, Get_Named_Entity (Pfx), Dest_Base, Dest_Typ, Dest_Off, Dest_Dyn); |