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author | Tristan Gingold <tgingold@free.fr> | 2019-09-25 21:07:51 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-09-25 21:07:51 +0200 |
commit | 030bf768bc26708ce0bd906427cc6acacad83c4c (patch) | |
tree | f321dd9f2020d90511e34d497550fdb3bfa3fc83 | |
parent | 241c2939195143386ad2c4a31127e921ea0e306b (diff) | |
download | ghdl-030bf768bc26708ce0bd906427cc6acacad83c4c.tar.gz ghdl-030bf768bc26708ce0bd906427cc6acacad83c4c.tar.bz2 ghdl-030bf768bc26708ce0bd906427cc6acacad83c4c.zip |
synth: allow entities with no ports.
-rw-r--r-- | src/synth/netlists.adb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/synth/netlists.adb b/src/synth/netlists.adb index 66854a714..079134b78 100644 --- a/src/synth/netlists.adb +++ b/src/synth/netlists.adb @@ -158,7 +158,6 @@ package body Netlists is return Module is pragma Assert (Is_Valid (Parent)); - pragma Assert (Nbr_Inputs + Nbr_Outputs > 0); Parent_Rec : Module_Record renames Modules_Table.Table (Parent); Res : Module; begin |