Fix ordering of $pmux ports

For Id_Pmux, IN(2+n) corresponds to s(n).
For $pmux, B[n*WIDTH-1:(n-1)*WIDTH] corresponds to S[n].

Therefore, the inputs need to be appended in ascending order, such that
IN(2) is assigned to B[WIDTH-1:0], IN(3) to B[2*WIDTH-1:WIDTH], etc.

1 files changed, 2 insertions, 2 deletions

diff --git a/src/ghdl.cc b/src/ghdl.cc
index 3541bc4..ef2ddaf 100644
--- a/src/ghdl.cc
+++ b/src/ghdl.cc
@@ -887,8 +887,8 @@ static void import_module(RTLIL::Design *design, GhdlSynth::Module m)
 		        {
 		            RTLIL::SigSpec b;
 			    RTLIL::SigSpec s = IN(0);
-			    for (unsigned i = s.size(); i > 0; i--)
-				    b.append(IN(2 + i - 1));
+			    for (int i = 0; i < s.size(); i++)
+				    b.append(IN(2 + i));
 			    module->addPmux(to_str(iname), IN(1), b, s, OUT(0));
 			}
 			break;