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| author | Tristan Gingold <tgingold@free.fr> | 2017-02-02 21:35:01 +0100 |
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| committer | Tristan Gingold <tgingold@free.fr> | 2017-02-02 21:35:01 +0100 |
| commit | bd7e5c9457471bb24d825574c9aa3d9a3af63c03 (patch) | |
| tree | 194781d16b082ae259f17dd8dc12b84b04ec7105 /icestick/fixed1.vhdl | |
| parent | fa2166d5bbf07ffc764b2e562f1eaf8ae3b4f1b6 (diff) | |
| download | ghdl-yosys-plugin-bd7e5c9457471bb24d825574c9aa3d9a3af63c03.tar.gz ghdl-yosys-plugin-bd7e5c9457471bb24d825574c9aa3d9a3af63c03.tar.bz2 ghdl-yosys-plugin-bd7e5c9457471bb24d825574c9aa3d9a3af63c03.zip | |
Add examples
Diffstat (limited to 'icestick/fixed1.vhdl')
| -rw-r--r-- | icestick/fixed1.vhdl | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/icestick/fixed1.vhdl b/icestick/fixed1.vhdl new file mode 100644 index 0000000..b1bbf4b --- /dev/null +++ b/icestick/fixed1.vhdl @@ -0,0 +1,4 @@ +architecture fixed1 of leds is +begin + (led1, led2, led3, led4, led5) <= std_logic_vector'("00101"); +end fixed1; |