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* printf: Use inttype.h macros for format stringsThomas Heijligen2023-04-271-1/+1
| | | | | | | | | | | | | | DJGPP for compiling DOS has other sizes for the normal int types and therefore throwing errors when using %i %d or %x with uint32_t. Fix these warnings by using the macros created for it and provided in inttypes.h. Change-Id: Ia75b6df981ce60c891161fe553c7ceab8570178d Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73040 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* internal: Move laptop_ok into board_cfgEdward O'Callaghan2023-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | Due to how internal is structured around chipset_flash_enable() entry we need to prepare a crafted programmer_cfg that contains a board_enable substructure with data derived from the board_enable subsystem. While this is certainly not perfection, it does make clear the relationships between board_enable into chipset_flash_enable and subsequently the overall internal programmer initialisation in a RAII fashion at the type level over closure upon global state that is impossible to reason about. Also flip predicate in report_nonwl_laptop_detected() and return early with the trivial base-case. TEST=`$ sudo ./flashrom -p internal --flash-name`. Change-Id: I459215253845c2af73262943ce91a36464e9eb06 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73456 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* internal: Move is_laptop into board_cfgEdward O'Callaghan2023-04-021-2/+2
| | | | | | | | Change-Id: I24e38e4457299934acdcd70325d0bf0f4b139e5f Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73455 Reviewed-by: Sam McNally <sammc@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* board_enables: Allow for prog cfg coupling with board cfgEdward O'Callaghan2023-04-021-80/+82
| | | | | | | | | | | | | | Some boards need to configure the programmer in specific ways. For example, a programmer such as internal may need to be configured either as laptop or not type and as such the board enable needs the ability to feed state back into the programmer configuration. Plumb this though by creating a board_cfg structure that can be packed. Change-Id: I7058a693e714a6966a842ae97cc8da7296e63e5e Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/71623 Reviewed-by: Sam McNally <sammc@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* board_enable.c: Consistent board_flash_enable() nullarity checksEdward O'Callaghan2023-03-281-4/+4
| | | | | | | | | | | | Use a consistent style, as is the case in the Linux kernel, of the canonical form of nullarity checking. Thus, making the function have a overall consistent style. Change-Id: Id28b8b70d9ecc9f69a1b61684500d9c6023ca045 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73454 Reviewed-by: Thomas Heijligen <src@posteo.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* board_enable.c: Clean up board_handle_phase()Edward O'Callaghan2023-03-281-6/+1
| | | | | | | | | | | The board_enable_safetycheck() call already checks nullarity of the function pointer. Change-Id: I956961ee7204d3a6a9066ba5945f95af1411e700 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73453 Reviewed-by: Thomas Heijligen <src@posteo.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* dmi.c: Pass is_laptop by ref into dmiEdward O'Callaghan2023-03-281-2/+2
| | | | | | | | | | | Prefix the remaining global cases with `g_` to avoid shadowing issues and for easy greping. Change-Id: I3d5ad6c0623269492d775a99a947fd6fe26c5f91 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/71622 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* tree/: Rename 'laptop_ok-> g_laptop_ok' to avoid shadowingEdward O'Callaghan2023-03-281-1/+1
| | | | | | | | | | Avoid global symbol shadowing in local functions. Change-Id: Idfca0b7e46d8051bf680227250cf40483e19dc53 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73646 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* Revert "pcidev: remove pcidev_getdevfn() function"Thomas Heijligen2023-03-201-2/+1
| | | | | | | | | | | | | | | As Edward pointed out correctly this function does more than abstracting the different versions of `pci_get_dev()`. It also hide the usage of the global `struct pci_access pacc` from the caller. This reverts commit 0e8902f1ff2b927bb91a5e89e4fde3d8d71f6692. Change-Id: I0cd2f54cb6a6e35dc353476e0f5e502cbbd06cba Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73730 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* pcidev: remove pcidev_getdevfn() functionThomas Heijligen2023-03-101-1/+2
| | | | | | | | | | | This function is only called once. Move the content of the function into the caller. Change-Id: Id2983420080f75ae6992edfb032bf5c83b29c803 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73570 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* internal,board_enable: Remove force_boardenable from globalsEdward O'Callaghan2023-01-151-9/+10
| | | | | | | | | | | | Make `force_boardenable` stack local to the internal_init() entry-point. It's life-time should not exceed that of the internal's init entry function. Change-Id: I3324681f024003694a5531d9d35bb13d2c583eb0 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/70031 Reviewed-by: Sam McNally <sammc@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* tests: Add selfcheck to unit testsEvan Benn2022-12-051-0/+1
| | | | | | | | | | | | | | | | | Add unit tests for programmer_table, flashchips, and board_matches structs. The tests are derived from the selfcheck function, checking that the required fields have been filled in. BUG=b:140595239 BRANCH=None TEST=meson test Change-Id: I41cd014d9bf909296b6c28e3e00548e6883ff41a Signed-off-by: Evan Benn <evanbenn@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/69620 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* tree: Retype variable `laptop_ok` with boolFelix Singer2022-09-081-1/+2
| | | | | | | | | | | | Use the bool type instead of an integer for the variable `laptop_ok`, since this represents its purpose much better. Signed-off-by: Felix Singer <felixsinger@posteo.net> Change-Id: I5d9fc3516bc2d29f11b056e35b3e5e324ce93423 Reviewed-on: https://review.coreboot.org/c/flashrom/+/66891 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* Add support for motherboard Jetway P4MDPTdirestraits962022-08-241-0/+1
| | | | | | | | | | | | | | | Add support for motherboard Jetway P4MDPT. According to the author of this patch, reading and writing works. Found on https://github.com/flashrom/flashrom/pull/241. Change-Id: I494863389d2afdb745d5c83a99cd955e6a5c334d Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/flashrom/+/63919 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* board_enable: Add ASUS P5W DH DeluxeTasos Sahanidis2022-06-201-0/+2
| | | | | | | | | | | Flashrom can now write to the onboard SST49LF008 flash Signed-off-by: Tasos Sahanidis <tasos@tasossah.com> Change-Id: Iea4f858cb45c60a6180de07c8361a8a831635dfd Reviewed-on: https://review.coreboot.org/c/flashrom/+/63736 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Thomas Heijligen <src@posteo.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* board_enable.c: Port to use pcidev_find_vendorclass() helperEdward O'Callaghan2022-05-041-15/+9
| | | | | | | | Change-Id: I3d8e3dbd5eeb057d7c959a82678cca2345fc69d9 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62405 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* hwaccess_x86_msr: rename msr function to msr_xxxThomas Heijligen2022-04-131-4/+4
| | | | | | | | | | | | This eliminates the need to redefine the rdmsr and wrmsr symbols, resulting in more understandable code. The common prefix clarify the relation between the functions. Change-Id: Ie5ad54d198312578e0a1ee719eec67b37d2bf6a4 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62851 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* dmi.c: Hide has_dmi_support global behind methodEdward O'Callaghan2022-04-051-1/+1
| | | | | | | | | | | | | | | | | This allows has_dmi_support to be become static local to just the scope of dmi.c BUG=none TEST=builds Change-Id: Ibded9714998ea6f2e5d4e0512fa7c6b105f9638a Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59283 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Thomas Heijligen <src@posteo.de>
* board_enable.c: Remove unnecessary assignmentaarya2022-03-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | In function board_asus_p3b_f there were two consecutive lines which modified the value of variable b // Do something with b b=INB(0x80); b=INB(smbba); //Do something with b Since the value of b is not used after first assignment, remove the first assignment. Change-Id: I7458b416a69fd5e2aa300ca49d1352b6074ad0bc Tested-by: Keith Hui <buurin@gmail.com> Signed-off-by: Aarya Chaumal <aarya.chaumal@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62761 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Keith Hui <buurin@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* pcidev: Move pci_dev_find() from internal to canonical placeEdward O'Callaghan2022-03-221-12/+12
| | | | | | | | | | | | | | | | | Also rename to `pcidev_find()` in fitting with pcidev.c helpers. BUG=b:220950271 TEST=```sudo ./flashrom -p internal -r /tmp/bios <snip> Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000. Reading flash... done. ``` Change-Id: Ie21f87699481a84398ca4450b3f03548f0528191 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59280 Reviewed-by: Thomas Heijligen <src@posteo.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* pcidev: Move pci_card_find() from internal to canonical placeEdward O'Callaghan2022-03-221-7/+7
| | | | | | | | | | | | | | | | | | | Also rename to `pcidev_card_find()` in fitting with pcidev.c helpers. BUG=b:220950271 TEST=```sudo ./flashrom -p internal -r /tmp/bios <snip> Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000. Reading flash... done. ``` Change-Id: I026bfbecba114411728d4ad1ed8969b469fa7d2d Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59279 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* pcidev: Move scandev_inclass logic from internal to pcidevEdward O'Callaghan2022-03-041-2/+2
| | | | | | | | | | | | | | | BUG=b:220950271 TEST=```sudo ./flashrom -p internal -r /tmp/bios <snip> Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000. Reading flash... done. ``` Change-Id: I1978e178fb73485f1c5c7e732853522847267cee Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59277 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* pcidev: Move pci_get_dev() logic into canonical placeEdward O'Callaghan2022-03-021-9/+1
| | | | | | | | | | | | | | | BUG=b:220950271 TEST=```sudo ./flashrom -p internal --flash-size <snip> Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000. 16777216 ``` Change-Id: Id9ce055d5e5d347520ec5002b8c6548e60eaa0a7 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59276 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
* hwaccess: fix build on non-x86 targetsPeter Marheine2022-01-251-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The changes to hwaccess in commit 49d758698a0dd166679c48b1a2785e50e9b0cc83 cause build failure on non-x86 systems because the hwaccess_x86_* headers are included in some files that are built for all platforms (particularly those in the internal programmer) and those headers in turn include <sys/io.h> which only exists on x86. This change avoids including those headers on non-x86 platforms so the internal programmer can be built without errors. The comment on the stub implementation of rget_io_perms() is also modified to remove references to non-x86 platforms, since that file is only built on x86 now. BUG=None TEST=meson build succeeds for both x86 and ARM targets Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I20f122679c30340b2c73afd7419e79644ddc3c4e Reviewed-on: https://review.coreboot.org/c/flashrom/+/61194 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* hwaccess: move mmio functions into hwaccess_physmapThomas Heijligen2022-01-201-1/+0
| | | | | | | | | | | The mmio_le/be_read/writex functions are used for raw memory access. Bundle them with the physmap functions. Change-Id: I313062b078e89630c703038866ac93c651f0f49a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61160 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess physmap: move x86 msr related code into own filesThomas Heijligen2021-12-221-0/+1
| | | | | | | | | | | | Allow x86 msr related code to be compiled independent from memory mapping functionality. This enables for a better selection of needed hardware access types. Change-Id: Idc9ce9df3ea1e291ad469de59467646b294119c4 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60111 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess: move x86 port I/O related code into own filesThomas Heijligen2021-12-221-0/+1
| | | | | | | | | | | | Allow port I/O related code to be compiled independent from memory mapping functionality. This enables for a better selection of needed hardware access types. Change-Id: I372b4a409f036da766c42bc406b596bc41b0f75a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60110 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* pci.h: move include into own wrapperThomas Heijligen2021-12-221-0/+1
| | | | | | | | | | | Split the include of hwaccess and libpci. There is no need to have pci.h included in hwaccess. Change-Id: Ibf00356f0ef5cc92e0ec99f8fe5cdda56f47b166 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58883 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Add board enable for ASUS P3B-FKeith Hui2020-05-191-0/+47
| | | | | | | | | | | With this change flashrom can detect, enable and flash on this board both under vendor BIOS and coreboot. Change-Id: I395ff50fbcda8ecdaa26033f0d99b2b0eb42f7ff Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/41354 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* board_enable: Work around -Wtype-limits issueNico Huber2019-10-051-1/+1
| | | | | | | | | | | | | In case of an empty `board_matches` list (i.e. on non-x86), we checked if the `unsigned i` is smaller 0. Shuffling the computation avoids that problem. Change-Id: I636d73c920a7b7e7507eafe444bab8236d7acb67 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/35801 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* Add board enable for Asus P4P800SEMiklós Márton2019-10-041-0/+2
| | | | | | | | | | | See github issue #32: https://github.com/flashrom/flashrom/issues/32 Change-Id: I12b25ca3f85e5f2302681bddbe1adafa49c5fcb9 Signed-off-by: Miklós Márton <martonmiklosqdev@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/34764 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* internal: Fix board vendor and model memory leaksJacob Garber2019-09-241-1/+1
| | | | | | | | | | | | | The board vendor and model are sometimes specified as arguments during an internal flash, so make sure they are freed at the end of initialization. Change-Id: I9f43708f3b075896be67acec114bc6f390f8c6ca Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Found-by: Coverity CID 1230664, 1230665 Reviewed-on: https://review.coreboot.org/c/flashrom/+/34846 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* Fix -Wsign-compare troubleNico Huber2019-07-311-1/+2
| | | | | | | | | | | Mostly by changing to `unsigned` types where applicable, sometimes `signed` types, and casting as a last resort. Change-Id: I08895543ffb7a48058bcf91ef6500ca113f2d305 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/30409 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
* tree: Make internal functions staticJacob Garber2019-06-231-2/+2
| | | | | | | | | | | | None of these functions are used outside of the files they are defined in, so make them all static. Change-Id: Ie9cbe12d289bcedacf2f1bf483ae64ef8039ccc1 Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33667 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Rework internal bus handling and laptop bail-outNico Huber2019-06-061-1/+4
| | | | | | | | | | | | | | | | | | | | | | We used to bail out on any unknown laptop. However, modern systems with SPI flashes don't suffer from the original problem. Even if a flash chip is shared with the EC, the latter has to expect the host to send regular JEDEC SPI commands any time. So instead of bailing out, we limit the set of buses to probe. If we suspect to be running on a laptop, we only allow probing of SPI and opaque programmers. The user can still use the existing force options to probe all buses. This will obsolete some board-enables that could be moved to `print.c` in follow-up commits. Change-Id: I1dbda8cf0c10d7786106f14f0d18c3dcce35f0a3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/28716 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Thomas Heijligen <src@posteo.de>
* Fix several -Wold-style-declaration warningsRichard Hughes2019-02-031-1/+1
| | | | | | | | Change-Id: Iffe5e652779a13ee7f64696fb5df4a781fe9a632 Signed-off-by: Richard Hughes <richard@hughsie.com> Reviewed-on: https://review.coreboot.org/c/30404 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* board_enable.c: Fix dmi_match string for ThinkPad X201Arthur Heymans2018-07-311-1/+1
| | | | | | | | | | | | TESTED, flashrom now properly works on Thinkpad X201 running vendor firmware and coreboot. Change-Id: I40dc7204499323148707b392d94ecd4b212f9ace Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/27504 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* Remove unneeded white spacesElyes HAOUAS2018-06-241-3/+3
| | | | | | | | | Change-Id: I90f171924790ced74a62ca344fee8607607aa480 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26652 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Remove address from GPLv2 headersElyes HAOUAS2018-04-241-4/+0
| | | | | | | | Change-Id: I7bfc339673cbf5ee2d2ff7564c4db04ca088d0a4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25381 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Fix whitespace errorsElyes HAOUAS2018-04-241-4/+4
| | | | | | | | Change-Id: Ic2d3bb9d8581a0471a8568a130f893b34dddf113 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* board_enable: add AOpen i965GMt-LALuc Verhaegen2018-03-291-0/+2
| | | | | | | | Change-Id: I8899bbe06707fe76256539f90f5b670301228d52 Signed-off-by: Luc Verhaegen <libv@skynet.be> Reviewed-on: https://review.coreboot.org/25396 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Whitelist Lenovo Thinkpad X220Arthur Heymans2018-03-071-0/+1
| | | | | | | | | | | | | | Coreboot uses the subvendor VID/DID of the Thinkpad X220-Tablet for all X220 variants. Don't specify a dmidecode string so that it can be used with coreboot on all X220 variants and on X220-Tablet with vendor firmare. Change-Id: Idd667da8209a664469c1a909a549d2b625714a78 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23225 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* board_enable: Whitelist several ThinkPad laptopsLeah Rowe2018-02-201-0/+4
| | | | | | | | | | | | | | | | Newly whitelisted laptops include: * ThinkPad R400 * ThinkPad T500 * ThinkPad W500 * Libiquity Taurinus X200 Change-Id: I772f8e109c56a5fd40f6b1aff0f592b915669c17 Signed-off-by: Leah Rowe <leah@libreboot.org> Reviewed-on: https://review.coreboot.org/23781 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* Whitelist Roda/RV11 laptopNico Huber2017-06-141-0/+1
| | | | | | | | Change-Id: I036c1f8cb914c8e3cca9d17eb221b582d7414ae9 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/18739 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* Add iMac5,2 to board_enableArthur Heymans2017-04-161-0/+1
| | | | | | | | | | | | When running coreboot everything works, while on vendor bios it fails to erase anything until the 3th erase function of a SST25VF016B is tried. Change-Id: I5e4daaa67f98a47e237cd73962776da369c8f0b5 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18943 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
* Add a bunch of new/tested stuff and various small changes 25Stefan Tauner2016-03-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - ASRock Fatal1ty 970 Performance and P4i65G Reported by anonymous email message ID: 932677687262b1300eaf14260999d9262c31@guerrillamail.com The latter actually had a tested board enable already. Flash chips: - Eon EN25Q128 to PREW (+PREW) Reported by Adrian Graham - GigaDevice GD25VQ41B to PREW (+PREW) Reported by David Hendricks - Winbond W39V040FB to PREW (+EW) Reported by fjed on IRC Miscellaneous: - Change PCI IDs of "MS-6577 (Xenon)" board enable. The previous IDs contained the on-board display adapter which is disabled when a dedicated graphics card is installed. - Add a note to the README how to overcome the clang warning if only a single programmer is enabled. - Fix some typo and manpage problems found by lintian - r1920 introduced some explicit calls to pkg-config instead of $(PKG_CONFIG). This patch corrects that. - Make MS-7094 (K8T Neo2-F V2.0) board enable less contestable. Previous PCI IDs were board-specific but ot the other of devices that could be disabled by the firmware or that vary among hardware revions. There are no good alternatives available. However, since we always have a DMI decoder available now, we can use non-board-specific devices without taking risks. Thanks to Uwe Hermann for reporting and testing. - Some other small changes to clean up whitespace and fix some warnings from Debian's lintian. Corresponding to flashrom svn r1951. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a bunch of new/tested stuff and various small changes 24Stefan Tauner2016-01-231-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - ASRock G31M-GS Reported by Александр Трубицын - ASRock G41M-VS3 Reported by Александр Трубицын - ASRock N68C-S UCC Reported by Alexey Belyaev - ASRock AMCP7AION-HT (ION 330HT(-BD)) Reported by Stefan Tauner - ASUS P5K SE Reported by Александр Трубицын - ASUS P5KPL-VM Reported by Marin Vlah - ASUS RAMPAGE III GENE Reported by stevessss on IRC - GIGABYTE GA-945GM-S2 Reported by Александр Трубицын - GIGABYTE GA-945GCM-S2 (rev. 3.0) Reported by Александр Трубицын - GIGABYTE GA-965P-S3 Reported by Александр Трубицын - GIGABYTE GA-EG43M-S2H Reported by Александр Трубицын - GIGABYTE GA-EP31-DS3L (rev. 1.0) Reported by Александр Трубицын - GIGABYTE GA-G33M-S2 Reported by Александр Трубицын - GIGABYTE GA-G33M-S2L Reported by Александр Трубицын - GIGABYTE GA-H55M-S2 Reported by Александр Трубицын - GIGABYTE GA-J1900N-D3V Reported by Marcos Truchado and Guillermo von Hünefeld - GIGABYTE GA-K8NS Reported by nicolae788 - GIGABYTE GA-M56S-S3 Reported by Estevo Paz Freire - GIGABYTE GA-P31-DS3L Reported by Александр Трубицын - GIGABYTE GA-P31-S3G Reported by Александр Трубицын - MSI MS-7336 Reported by Benjamin Bellec - MSI X79A-GD45 (8D) (MS-7760)" Reported by mortehu on IRC - Supermicro A1SAi-2550F Reported by Bernard Grymonpon - Supermicro X7DWT Reported by Steven Stremciuc Laptop: - ASUS U38N Reported by Ultra on IRC - Dell Latitude D630 Reported by Márton Miklós - Fujitsu Amilo Xi 3650 Reported by Elmar Stellnberger - Lenovo T400 (whitelisting only) Chipsets: - Mark 8086:1f38 (Intel Avoton/Rangeley) as tested Reported by Jeremy Porter and Bernard Grymonpon - Add Intel Sunrise Point IDs but no support yet. Flash chips: - Atmel AT45DB321D to PREW (+PREW) Reported by The Raven - Eon EN25QH32 to PREW (+PREW) Reported by Josua Mayer - Eon EN25QH64 to PREW (+EW) Reported by David s. Alessio - GigaDevice GD25LQ64(B) to PREW (+PREW) Reported by Greg Tippit - Intel 28F001BN/BX-T to PREW (+EW) Reported by Lu Xie - Micron M25P10-A to PREW (+W) Reported by the Raven - Micron M25PE40 Reported by David Wood - Micron N25Q128..3E to PREW (+PREW) Reported by Miklós Márton - Macronix MX25L3273E to PREW (+PREW) Reported by Roklobsta on IRC - Macronix MX23L6454 to PR (+PR) Reported by Steven Honeyman - Macronix MX25U6435E/F to PREW (+PREW) Reported by Marcos Truchado and Guillermo von Hünefeld - PMC Pm25LQ032C to PREW (+EW) Reported by Dirk Knop - Spansion S25FL016A to PREW (+EW) Reported by Márton Miklós - Spansion S25FL128S......0 to PREW (+PREW) Reported by Jim Houston - Spansion S25FL204K to PR (+PR) Reported by Thomas Debrunner - SST SST49LF016C to PREW (+EW) Reported by Steven Stremciuc - SST SST39VF040 to PREW (+PREW) Reported by Xavier Bourgeois - SST SST49LF040B to PREW (+EW) Reported by Rikard Åhlund - ST M25P10-A to PREW (+W) Reported by Martijn Schiedon - Winbond W39V040FA to PREW (+EW) Reported by Евгений Черкашин - Winbond W39V080FA to PREW (+EW) Reported by protagonist0 on IRC - Winbond W25Q80.W to PREW (+PREW) Reported by Miklós Márton - Winbond W25X64 to PREW (+REW) Reported by Johannes Krampf and Manuel Dejonghe - Fix ID of AMIC A25LQ64 Reported by Roman Titov - Fix page size of Spansion S25FL129P......1 Copy and paste error from the 128S uniform 256kB variant, probably. - Add Micron/Numonyx phase-change memory IDs Miscellaneous: - Detect Android target OS. No changes are required to build flashrom (excluding programmers with NEED_PCI) on Android. - Update rayerspi (spipgm) URL - Fix max_data_write handling of at45db. - Minor refinement of the README - Mark board enable for the GA-K8NS variants as tested. Tested by "nicolae788" on a board with socket 754. - Mark "Multi-system" chassis as non-laptop case. - Remove W836xx log requests. We got enough (and no one is looking at them for the time being anyway). - serprog: improve invalid reply error message, contributed by Urja Rannikko. - Remove default include paths for MinGW. - Disable implicit rules in the Makefile because we don't need them and they just make the build (imperceptibly) slower. - Enable our own strnlen() implementation not only on DJGPP but also if HAVE_STRNLEN is not defined. This is needed to get older BSDs (e.g. NetBSD 6.0, FreeBSD < 8.0) to work. - Tiny other stuff. Corresponding to flashrom svn r1917. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add a bunch of new/tested stuff and various small changes 23Stefan Tauner2015-03-011-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - Elitegroup GF7050VT-M Reported by Alex - Fujitsu D2724-A1x (used in ESPRIMO E5625) Reported by Rainer Spillmann - Teclast X98 Air 3G Reported by Antonio Ospite Flash chips: - Fix MX25L6405(D) definition by splitting it. Reported by Reggie McMurtrey - Add Macronix MX25L..08E family and rearrange MX25L6436E. - Pm49FL004 to PREW (+EW) Reported by Georg Sauthoff Miscellaneous: - Add board enable for abit KN9 Ultra. - Mark ARM-USB-OCD as working OK. - Use "mobile devices" instead of "laptops" in output. - Tiny other stuff. Corresponding to flashrom svn r1886. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Refine version check of libpci function pci_get_devStefan Tauner2015-02-081-1/+1
| | | | | | | | | | | | | The way more elegant check for the header fails unfortunately on CentOS 4.9 because PCI_LIB_VERSION is not defined at all although the domain parameter is present. This patch jumps through the hoops via an additional check in the Makefile to determine if the function accepts 5 parameters (new version) or not (old version). Corresponding to flashrom svn r1880. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add a bunch of new/tested stuff and various small changes 22Stefan Tauner2015-02-081-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - AOpen UK79G-1394 (used in EZ18 barebones) Reported by Lawrence Gough - ASUS M4N78 SE Reported by Dima Veselov - ASUS P5LD2-VM Mark board enable as tested (reported by Dima Veselov) - GIGABYTE GA-970A-UD3P (rev. 2.0) Reported by trucmar on IRC - GIGABYTE GA-990FXA-UD3 (rev. 4.0) Reported by ROKO__ on IRC - GIGABYTE GA-H77-DS3H (rev. 1.1) Reported by Evgeniy Edigarev - GIGABYTE GA-P55-USB3 (rev. 2.0) Reported by Måns Thörnqvist - MSI MS-7817 (H81M-E33) Reported by Igor Kolker Chipsets: - Marked Intel Bay Trail (0x0f1c) as tested OK Reported by Antonio Ospite - Refine Intel IDs * Add IDs for Braswell * Add IDs for 9 Series PCHs (e.g. H97, Z97) * Rename Wellsburg devices slightly Flash chips: - Atmel AT25DF041A to PREW (+PREW) Reported by Tai-hwa Liang - Atmel AT26DF161 to PREW (+EW) Reported by Steve Shenton - Atmel AT45DB011D to PREW (+PREW) Reported by The Raven - Atmel AT45DB642D to PREW (+PREW) Reported by Mahesh Mokal - Eon EN25F32 to PREW (+PREW) Reported by Arman Khodabande - Eon EN25F40 to PREW (+REW) Reported by Jerrad Pierce - Eon EN25QH16 to PREW (+EW) Reported by Ben Johnson - GigaDevice GD25Q20(B) to PREW (+PREW) Reported by Gilles Aurejac - Macronix MX25U6435E/F to PR (+PR) Reported by Matt Taggart - PMC Pm25LV512(A) to PREW (+PREW) Reported by The Raven - SST SST39VF020 to PREW (+PREW) Reported by Urja Rannikko - Winbond W25Q40.V to PREW (+EW) Reported by Torben Nielsen - Add E variants of MX25Lx006 (MX25L2006E, MX25L4006E, MX25L8006E). - Add MX25L6465E variant. - There was never a MX25L12805 AFAICT. - Split MX25L12805 from models with the same ID but an additional 32 kB eraser: MX25L12835F/MX25L12845E/MX25L12865E. - Add a bunch of ST parallel NOR flash chip IDs. Miscellaneous: - Whitelist ThinkPad X200. - Constify master parameter of register_master(). - Remove FEATURE_BYTEWRITES because it was never used at all. - Refine hwseq messages and make them less prominent. - Fix the yet unused PRIxCHIPADDR format string thingy. - Fix copy&paste error in spi_prettyprint_status_register_bp(). Spotted by Pablo Cases. - Add an additional SMBus controller revision to identify another Yangtze model. Thanks to Dan Christensen for reporting this issue. - dediprog: add missing include for stdlib.h. This fixes (at least) building on FreeBSD and DragonflyBSD with gcc. - Remove references to struct pci_filter from programmer.h. It is only needed in internal.c where it has a complete type. Having it in programmer.h provokes a warning by some old versions of gcc. - Tiny other stuff. Corresponding to flashrom svn r1879. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-13 02:46:18 +0000