diff options
| -rw-r--r-- | chipset_enable.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index b5385dc4..afb82aa2 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -264,8 +264,17 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, (old & (1 << 0)) ? "en" : "dis"); msg_pdbg("BIOS_CNTL is 0x%x\n", old); - new = old | 1; + /* + * Quote from the 6 Series datasheet (Document Number: 324645-004): + * "Bit 5: SMM BIOS Write Protect Disable (SMM_BWP) + * 1 = BIOS region SMM protection is enabled. + * The BIOS Region is not writable unless all processors are in SMM." + * In earlier chipsets this bit is reserved. */ + if (old & (1 << 5)) { + msg_pinfo("WARNING: BIOS region SMM protection is enabled!\n"); + } + new = old | 1; if (new == old) return 0; |