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author | Karthikeyan Ramasubramanian <kramasub@chromium.org> | 2022-04-06 16:07:38 -0600 |
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committer | Edward O'Callaghan <quasisec@chromium.org> | 2022-04-12 12:28:01 +0000 |
commit | 881bf1739efc915a5906287c1f237d6a13037412 (patch) | |
tree | d3cf96306f680e62560b35573c5009676cd696d4 /tests | |
parent | b1db7e4367e3e34140ee12447d7692019d33007a (diff) | |
download | flashrom-881bf1739efc915a5906287c1f237d6a13037412.tar.gz flashrom-881bf1739efc915a5906287c1f237d6a13037412.tar.bz2 flashrom-881bf1739efc915a5906287c1f237d6a13037412.zip |
sb600spi.c: Add Promontory chipset rev 0x71
Sabrina SoC uses SMBUS revision code 0x71 which behaves exactly as the
promontory chip. Hence add 0x71 as promontory.
BUG=b:228238107
TEST=Build and deploy flashrom in Skyrim. Ensure that flashrom is able
to detect the SPI ROM chip, read from it and write to it successfully.
Ran flashrom_tester on Skyrim (Sabrina SoC) successfully and ensured
that all the tests passed.
Change-Id: I2408959fbf1c105508f0a12f38418c9606280ab9
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/63423
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'tests')
0 files changed, 0 insertions, 0 deletions