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| author | Edward O'Callaghan <quasisec@google.com> | 2020-12-29 18:54:31 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2021-01-01 23:46:57 +0000 |
| commit | c9b31f5738db9bf2f4d82bd3db2ec78dc2bb4f14 (patch) | |
| tree | c23a77417145565bffb287baeb9a3ab532f05023 /spi25_statusreg.c | |
| parent | ef42b5edb346a8daaf9e732f9f8c317d763e48ac (diff) | |
| download | flashrom-c9b31f5738db9bf2f4d82bd3db2ec78dc2bb4f14.tar.gz flashrom-c9b31f5738db9bf2f4d82bd3db2ec78dc2bb4f14.tar.bz2 flashrom-c9b31f5738db9bf2f4d82bd3db2ec78dc2bb4f14.zip | |
realtek_mst_i2c_spi.c: Don't depend on int overflows
Be explicit to mask the first byte after the shifts as
highlighted by Angel Pons.
BUG=none
BRANCH=none
TEST=builds
Change-Id: I7d1215678094d709e79b8f8c96aa3810586cd72e
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Spotted-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48974
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Shiyu Sun <sshiyu@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'spi25_statusreg.c')
0 files changed, 0 insertions, 0 deletions