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| author | Nikolai Artemiev <nartemiev@google.com> | 2020-12-14 07:39:02 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2021-01-13 01:46:37 +0000 |
| commit | f384161b5a122411bd22cc90a19f8a1a08de73e7 (patch) | |
| tree | fa35c56a62a6b8e544775a0aa23f59c8c2861270 /mcp6x_spi.c | |
| parent | 3170bc3a8e62fe5be8af840454031b39487b31d5 (diff) | |
| download | flashrom-f384161b5a122411bd22cc90a19f8a1a08de73e7.tar.gz flashrom-f384161b5a122411bd22cc90a19f8a1a08de73e7.tar.bz2 flashrom-f384161b5a122411bd22cc90a19f8a1a08de73e7.zip | |
spi25_statusreg.c: restore SR contents at flashrom exit
register_chip_restore() provides a general mechanism for restoring a chip's state at flashrom exit; it can be used whenever the SR needs to be changed temporarily to perform some operation and changed back after the operation is complete. The only current current use case is in s25f.c, which changes the SR's sector layout bits so that entire flash accessible.
This patch uses the chip restore functionality to reset changes to the status register made by spi_disable_blockprotect_generic(). This should help to ensure consistency across multiple runs of flashrom and make it easier to predict how a specific operation will change the flash.
Imported from cros flashrom at `b170dd4e1d5c33b169c5`
Change-Id: If2f0e73518d40519b7569f627c90a34c364df47c
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48778
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'mcp6x_spi.c')
0 files changed, 0 insertions, 0 deletions