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author | Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> | 2017-03-22 14:08:31 +0100 |
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committer | David Hendricks <david.hendricks@gmail.com> | 2017-09-17 18:03:42 +0000 |
commit | 7b629bcde47e18d094e496fb8ae537272ead0998 (patch) | |
tree | 3c44a9d573fb61ca483054a845722e051558aefd /flashrom.c | |
parent | 8681df128708a548e64865bb6fd8f6cd957e061d (diff) | |
download | flashrom-7b629bcde47e18d094e496fb8ae537272ead0998.tar.gz flashrom-7b629bcde47e18d094e496fb8ae537272ead0998.tar.bz2 flashrom-7b629bcde47e18d094e496fb8ae537272ead0998.zip |
sb600spi: Add support for Merlin Falcon Chipset
This patch has been tested on a board similar to AMD Bettong.
00:14.0 SMBus [0c05]: Advanced Micro Devices, Inc. [AMD] FCH SMBus
Controller [1022:790b] (rev 4a)
00:14.3 ISA bridge [0601]: Advanced Micro Devices, Inc. [AMD] FCH LPC
Bridge [1022:790e] (rev 11)
root@qt5022-fglrx:~# ./flashrom -p internal -w kk.rom
flashrom v0.9.9-unknown on Linux 4.10.0-qtec-standard (x86_64)
flashrom is free software, get the source code at
https://flashrom.org
Calibrating delay loop... OK.
coreboot table found at 0x9ffd6000.
Found chipset "AMD FP4".
Enabling flash write... OK.
Found Micron/Numonyx/ST flash chip "N25Q128..1E" (16384 kB, SPI)
mapped at physical address 0x00000000ff000000.
Reading old flash chip contents... done.
Erasing and writing flash chip... Erase/write done.
Verifying flash... VERIFIED.
Change-Id: I66a240ebc8382cc7e5156686045aee1a9d03fe6d
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-on: https://review.coreboot.org/21429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'flashrom.c')
0 files changed, 0 insertions, 0 deletions