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author | Luc Verhaegen <libv@skynet.be> | 2009-12-23 00:54:26 +0000 |
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committer | Luc Verhaegen <libv@skynet.be> | 2009-12-23 00:54:26 +0000 |
commit | 73d2119473b3495c13f1c1e2057c65929b522a69 (patch) | |
tree | 6dccaacc9ec5a0d1d6e9c28d776d91c4b3f98237 /chipset_enable.c | |
parent | db53ec5373db0517c77f91d5d9e447f0771a0243 (diff) | |
download | flashrom-73d2119473b3495c13f1c1e2057c65929b522a69.tar.gz flashrom-73d2119473b3495c13f1c1e2057c65929b522a69.tar.bz2 flashrom-73d2119473b3495c13f1c1e2057c65929b522a69.zip |
Chipset/Board: vt8237: Set All mem cycles to LPC in chipset enable
Only done for VT8237R (possibly needed for VT8237 too), VT8235 does
not need this (even if the original bios does so: Asus A7V8X-MX SE,
MSI KT4V were verified).
This then opens a floodgate of cleanups in the board enables.
* EPIA SP board enable vanishes, taking EPIA CN match with it.
* Asus A7V8X-MX/Tyan S2498 board enable then equals
w836xx_memw_enable_2e
* AOpen vKM400Am-S board enable then equals it8705_rom_write_enable
* Epia M board enable becomes via_vt823x_gpio15_raise
* Epia N board enable becomes via_vt823x_gpio9_raise
* Asus M2V-MX board enable becomes via_vt823x_gpio5_raise
* vt823x_gpio_set becomes via_vt823x_gpio_set, and now detects ISA
bridge itself, in concordance with intel ich and nvidia mcp gpio.
Corresponding to flashrom svn r815.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'chipset_enable.c')
-rw-r--r-- | chipset_enable.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index f618a371..729706d7 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -667,6 +667,13 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name) return -1; } + if (dev->device_id == 0x3227) { /* VT8237R */ + /* All memory cycles, not just ROM ones, go to LPC. */ + val = pci_read_byte(dev, 0x59); + val &= ~0x80; + pci_write_byte(dev, 0x59, val); + } + return 0; } |